H. Le-langage and . Utilisé, Certains éléments fortement " orientés contrôle " peuvent donc être utilisés avec des langages formels comme ceux décrits au chapitre 2.5.3. 6.3.6 Expérimentation de la méthodologie avec des IP matériels Les expérimentations réalisées ont porté sur la génération d'interfaces de communication entre un processeur de communication et un réseau de communication. Cela permettait en effet d'étudier l'intérêt de la méthode pour le découpage logiciel/matériel des communications

]. G. Bibliographiealm89, A. Almasi, and . Gottlieb, Highly parallel computing, 1989.

[. Limited, AMBA Specification (Rev 2.0), 1999.

[. Limited, AHB CPU Wrappers Technical Reference Manual, 2001.

[. Limited, ARM966E-S (Rev2) Technical Reference Manual, 2002.

[. Limited, ARM946E-S Technical Reference Manual

A. Limited, ARM926EJ-S (r0p4/r0p5) Technical Reference Manual, 2004.

A. Limited, Multi-Layer AHB Overview

]. A. Bag98, J. L. Baganne, E. Philippe, and . Martin, A Formal Technique for Hardware Interface Design, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 1998.

]. L. Ben02, G. D. Benini, and . Micheli, Networks on Chips: A New SoC Paradigm, IEEE Computer, vol.35, issue.1, pp.70-78, 2002.

]. P. Bho03, R. Bhojwani, and . Mahapatra, Interfacing Cores with On-chip Packet-Switched Networks, Proceedings of the 16th International Conference on VLSI Design (VLSI'03), 2003.

]. C. Bök00 and . Böke, Combining Two Customization Approaches: Extending the Customization Tool TEReCS for Software Synthesis of Real-Time Execution Platforms, Proceedings of the Workshop on Architectures of Embedded Systems (AES2000), 2000.

]. D. Bra02 and . Brash, The ARM Architecture Version 6 (ARMv6), 2002.

]. Bru00, W. M. Brunel, H. J. Kruijtzer, F. Kenter, L. Pétrot et al., COSY Communication IP's, Proceedings of Design Automation Conference, 2000.

]. R. Bry01, K. Bryant, A. B. Cheng, K. Kahng, W. Keutzer et al., Limitations and challenges of computer-aided design technology for CMOS VLSI, Proceedings of the IEEE, pp.89-341, 2001.

]. W. Ces01, G. Cesario, L. Nicolescu, D. Gauthier, A. A. Lyonnard et al., Colif: A Design Representation for Application-Specific Multiprocessor SOCs, IEEE Design & Test of Computers, vol.18, issue.5, 2001.

]. W. Ces02, A. Cesario, L. Baghdadi, D. Gauthier, G. Lyonnard et al., Component-Based Design Approach for Multicore SoCs, Proc. of the DAC, pp.10-14, 2002.

]. E. Che03, Y. Chen, D. Shi, G. Zhang, and . Xu, A programming framework for service association in ubiquitous computing environments, Proceedings of the 2003 Joint Conference of the Fourth International Conference on Information, Communications and Signal Processing and Fourth Pacific Rim Conference on Multimedia (ICICS-PCM 2003), 2003.

]. D. Cul99b, J. Culler, and . Singh, Parallel Computer Architecture, 1999.

]. G. Cyr01, G. Cyr, M. Bois, and . Aboulhamid, Synthesis of communication interface for soc using VSIA recommendations, Proc. of Designers' Forum, Design And Test European Conference, pp.155-159, 2001.

]. W. Dal01, B. Dally, and . Towles, Route Packets, Not Wires: On-Chip Interconnection Networks, Proceedings of the Design Automation Conference, pp.684-689, 2001.

]. J. Die03, A. Dielissen, K. Radulescu, E. E. Goossens, and . Rijpkema, Concepts and Implementation of the Philips Network-on-Chip, 2003.

]. R. Döm98, D. D. Dömer, J. Gajski, and . Zhu, Specification and Design of Embedded Systems " , it+ti magazine, 1998.

A. Donlin, Transaction level modeling, Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis , CODES+ISSS '04, pp.75-80, 2004.
DOI : 10.1145/1016720.1016742

]. S. Dut01, R. Dutta, A. Jensen, and . Rieckman, Viper: A Multiprocessor SOC for Advanced Set-Top Box and Digital TV Systems, 2001.

M. Dziri, Modèles d'intégration d'outils et de composants logiciel/matériel pour la conception des systèmes hétérogènes embarqués, Thèse de Doctorat, Institut National Polytechnique de Grenoble (INPG), 2004.

]. C. Ens01 and . Ensel, A Scalable Approach to Automated Service Dependency Modeling in Heterogeneous Environments, 5th International Enterprise Distributed Object Computing Conference (EDOC '01), 2001.

]. D. Fly97 and . Flynn, AMBA: Enabling Reusable On-Chip Designs, IEEE Micro, 1997.

L. Gauthier, Génération de système d'exploitation pour le ciblage de logiciel multitâche sur des architectures multiprocesseurs hétérogènes dans le cadre des systèmes embarqués spécifiques, Thèse de Doctorat, Institut National Polytechnique de Grenoble (INPG), 2001.

[. Gharsalli, Conception des interfaces logiciel-mat??riel pour l'int??gration des m??moires globales dans les syst??mes monopuces, Thèse de Doctorat, Institut National Polytechnique de Grenoble (INPG), 2003.
DOI : 10.3166/tsi.24.369-394

]. K. Goo04, O. P. Goossens, J. Gangwal, A. P. Roever, and . Niranjan, Interconnect and Memory Organization in SOCs for advanced Set-Top Boxes and TV ---Evolution, Analysis, and Trends Interconnect- Centric Design for Advanced SoC and NoC, Kluwer, avril, 2004.

]. P. Gue00, A. Guerrier, and . Greiner, A Generic Architecture for On-chip Packet-switched Interconnections, Proceedings of the DATE'2000 Conference, pp.250-256, 2000.

]. A. Hav02, M. Haverinen, N. Leclercq, D. Weyrich, and . Wingard, SystemC based SoC Communication Modeling for the OCP Protocol, Disponible sur, 2002.

D. Hommais, F. Pétrot, and I. Augé, A practical tool box for system level communication synthesis, Proceedings of the ninth international symposium on Hardware/software codesign , CODES '01, 2001.
DOI : 10.1145/371636.371674

D. Hommais, Une méthode d'évaluation et de synthèse des communications dans les systèmes intégrés matériel-logiciel, Thèse de Doctorat, 2001.

[. Ibm, The CoreConnect TM Bus Architecture, Disponible sur, 1999.

]. A. Jal04, S. Jalabert, L. Murali, G. Benini, and . De-micheli, ×pipesCompiler: A Tool for Instantiating Application Specific Networks on Chip, DATE, pp.884-889, 2004.

]. A. Jan03 and . Jantsch, NoCs: A new contract between hardware and software, Proceedings of the Euromicro Symposium on Digital System Design, septembre 2003

]. A. Jer02 and . Jerraya, De l'ASIC au SoC, puis au réseau de composants sur puce, Veille Technologique, Le Magazine d'ASPROM, n° 25, 2001.

]. A. Jer04 and . Jerraya, HW-SW Interfaces Modeling & Design for MPSoC, Revue des travaux du Groupe de Synthèse au niveau Système, Seyssins, 2004.

]. F. Kar01, A. Karim, S. Nguyen, R. Dey, and . Rao, On-chip Communication Architecture for OC-768 Network Processors, Proceedings of the 38th conference on Design automation, 2001.

]. K. Lah00, A. Lahiri, S. Raghunathan, and . Dey, Evalutation of the Traffic-Performance Characteristics of System-on-chip Communication Architectures, Proc. of the DAC, 2000.

]. C. Len00, P. Lennard, G. D. Schaumont, A. Jong, P. Haverinen et al., Standards for System-Level Design: Practical Reality or Solution in Search of a Question?, Proc.of DATE, 2000.

]. B. Lin94, S. Lin, and . Vercauteren, Synthesis Of Concurrent System Interface Modules With Automatic Protocol Conversion Generation, IEEE/ACM International Conference on Computer-Aided Design, 1994.
DOI : 10.1109/ICCAD.1994.629751

]. D. Lyo01, S. Lyonnard, A. Yoo, A. A. Baghdadi, and . Jerraya, Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System ?on-Chip, Proc. of DAC, 2001.

[. Lyonnard, Approche d'assemblage systématique d'éléments d'interface pour la génération d'architecture multiprocesseur, Thèse de Doctorat, Institut National Polytechnique de Grenoble (INPG), 2003.

]. R. Lys00, F. Lysecky, T. D. Vahid, and . Givargis, Experiments with the peripheral virtual component interface, proceedings of the 13th international symposium on System synthesis (ISSS), pp.221-224, 2000.

]. R. Lys02, F. Lysecky, and . Vahid, Prefetching for Improved Bus Wrapper Performance in Cores, ACM Transactions on Design Automation of Electronic Systems, vol.7, issue.1, pp.58-90, 2002.

]. P. Mag02 and . Magarshack, Improving SoC Design Quality through a Reproducible Design Flow, IEEE Design & Test of Computers, vol.19, issue.1, pp.76-83, 2002.

]. M. Mil02 and . Millberg, The Nostrum Protocol Stack and suggested Services Provided by the Nostrum Backbone, 2002.

M. Millberg, E. Nilsson, R. Thid, S. Kumar, and A. Jantsch, The Nostrum backbone-a communication protocol stack for Networks on Chip, 17th International Conference on VLSI Design. Proceedings., 2004.
DOI : 10.1109/ICVD.2004.1261005

]. S. Nar95, D. D. Narayan, and . Gajski, Interfacing Incompatible Protocols using Inteface Process Generation, Proc. of DAC, 1995.

[. Nicolescu, Spécification et validation des systèmes hétérogènes embarqués, Thèse de Doctorat, Institut National Polytechnique de Grenoble (INPG), 2002.

]. J. Öbe01, M. O. Öberg, A. Nils, A. Jantsch, A. Postula et al., Grammar-based design of embedded systems, Journal of Systems Architecture, vol.47, pp.3-4, 2001.

]. J. Öbe99 and . Öberg, ProGram: A Grammar-Based Method for Specification and Hardware Synthesis of Communication Protocols, Royal Institute of Technology, 1999.

]. M. O-'ni98, J. O-'nils, A. J. Öberg, and . Jantsch, Grammar Based Modelling and synthesis of device drivers and bus interfaces, Proc. of the EuroMicro Workshop on Digital System Design, 1998.

]. M. O-'ni01, A. O-'nils, and . Jantsch, Device Driver and DMA Controller Synthesis from HW/SW Communication Protocol Specifications, Design Automation for Embedded Systems, 2001.

]. R. Pas98, J. A. Passerone, and . Rowson, Automatic Synthesis of Interfaces between Incompatible Protocols, Proc. of DAC, 1998.

[. Paviot, Partitionnement des services de communication en vue de la génération automatique des interfaces logicielles/matérielles, Thèse de Doctorat, Institut National Polytechnique de Grenoble (INPG), 2004.

L. Larry, B. S. Peterson, and . Davie, Computer Networks: A Systems Approach, 2003.

]. I. Pet05, P. Petkov, M. Amblard, A. A. Hristov, and . Jerraya, Systematic Design Flow For Fast Hardware/Software Prototype Generation From Bus Functional Model For MPSoC, RSP, pp.8-10, 2005.

]. A. Rad03, K. Radulescu, and . Goossens, Communication Services for Networks on Chip, Domain- Specific Processors: Systems, Architectures, Modeling, and Simulation, 2003.

A. Radulescu, J. Dielissen, K. Goossens, E. Rijpkema, and P. Wielage, An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Programming, Proceedings of Design Automation and Test Conference in Europe, 2004.

]. J. [-row97, A. S. Rowson, and . Vincentelli, Interface-Based Design, p.97

]. A. Sar04, W. Sarmento, A. A. Cesario, and . Jerraya, Automatic Building of Executable Models from Abstract SoC Architectures, 15th IEEE International Workshop on Rapid System Prototyping, 2004.

A. Sarmento, L. Kriaa, A. Grasset, M. Youssef, A. Bouchhima et al., Service Dependency Graph, an Efficient Model for Hardware/Software Interfaces Modeling and Generation for SoC Design, CODES-ISSS 2005, 2005.
URL : https://hal.archives-ouvertes.fr/hal-00105531

]. A. Sea94, F. Seawright, and . Brewer, Clairvoyant: A Synthesis System for Production-Based Specification, IEEE Transactions on VLSI Systems, vol.2, pp.172-185, 1994.

]. A. Sea96, U. Seawright, W. Holtmann, B. Meyer, R. Pangrle et al., A System for Compiling and Debugging Structured Data Processing Controllers, Proc. of Euro-DAC, 1996.

]. A. Sea98, W. Seawright, and . Meyer, Partitioning and optimizing controllers synthesized from hierarchical high-level descriptions, proceedings of the 35th annual conference on Design automation, pp.770-775, 1998.

]. M. Sgr01, M. Sgroi, A. Sheets, K. Mihal, S. Keutzer et al., Addressing the System-on-a-Chip Interconnect Woes Through Communication-Based Design, Proceedings of the 38th Design Automation Conference, 2001.

D. Shin and D. Gajski, Interface Synthesis from Protocol Specification, 2002.

]. R. Sie02, D. Siegmund, and . Müller, Automatic Synthesis of Communication Controller Hardware from Protocol Specifications, IEEE Design & Test of Computers, pp.84-95, 2002.

. Stm04a and . Stmicroelectronics, Nomadik ? Open multimedia platform for net generation mobile devices, technical article TA305, 2004.

. Stm04b and . Stmicroelectronics, Nomadik TM processor platform " , product flyer, 2004.

. Synopsys and . Inc, Protocol Compiler TM User Guide, 2001.

I. Synopsys, Design Compiler TM User Guide, Computer Networks, vol.08, 1996.

F. L. Drake and J. , OMG Unified Modeling Language Specification, Version 1.3 Disponible sur : http://www.rational.com/uml/resources/documentation/index.jsp [Van02] G. Van Rossum Extending and Embedding the Python Interpreter, 1997.

]. S. Ver96, B. Vercauteren, H. Lin, and . De-man, Constructing Application-Specific Heterogeneous Embedded Architectures from Custom HW/SW Applications, Proc. of DAC, 1996.

]. C. Via98, B. Vial, and . Rouzeyre, Cosynthèse matériel/logiciel : modélisation et synthèse des circuits d'interface, CODESIGN : Conception Conjointe Logiciel-Matériel " , édition Eyrolles, pp.125-146, 1998.

]. P. Wie02, K. Wielage, and . Goossens, Networks on Silicon: Blessing or Nightmare?, Euromicro Symposium On Digital System Design, 2002.

[. Wingard, Micronetwork-based integration for SOCs, Proceedings of the 38th conference on Design automation , DAC '01, 2001.
DOI : 10.1145/378239.379046

]. A. Zit02, M. Zitouni, K. Abid, R. Torki, and . Tourki, Communication synthesis techniques for multiprocessor systems, International Journal of Electronics, vol.89, pp.1-55, 2002.

]. M. Zit93, B. Zitterbart, A. N. Stiller, and . Tantawy, A Model for Flexible High-Performance Communication Subsystems, IEEE Journal on Selected Areas in Communications, vol.11, p.4, 1993.

A. Grasset, F. Rousseau, and A. A. Jerraya, Automatic Generation of Component Wrappers by Composition of Hardware Library Elements Starting from Communication Service Specification, 16th IEEE International Workshop on Rapid System Prototyping (RSP'05), 2005.
DOI : 10.1109/RSP.2005.16

URL : https://hal.archives-ouvertes.fr/hal-00013318

A. Grasset, F. Rousseau, and A. A. Jerraya, Vers l'Automatisation de la Conception des Coprocesseurs de Communication pour les Systèmes Monopuces, Journées nationales du réseau doctoral en Microélectronique (JNRDM 05), 2005.

A. Sarmento, L. Kriaa, A. Grasset, M. Youssef, A. Bouchhima et al., Service Dependency Graph, an Efficient Model for Hardware/Software Interfaces Modeling and Generation for SoC Design, CODES-ISSS 2005, 2005.
URL : https://hal.archives-ouvertes.fr/hal-00105531

A. Grasset, F. Rousseau, and A. A. Jerraya, Network interface generation for mpsoc: from communication service requirements to rtl implementation, Proceedings. 15th IEEE International Workshop on Rapid System Prototyping, 2004., 2004.
DOI : 10.1109/IWRSP.2004.1311097

URL : https://hal.archives-ouvertes.fr/hal-00008038

A. Grasset, F. Rousseau, and A. A. Jerraya, Génération des Interfaces de Communication pour Systèmes Multiprocesseurs Monopuces: de la Spécification des Services de Communication vers l'Implémentation RTL, Journées nationales du réseau doctoral en Microélectronique (JNRDM 04), 2004.