Conception d'une architecture de BIST analogique et mixte programmable en technologie CMOS très submicronique

Abstract : This report presents a BIST technique for harmonic testing of Analogue and Mixed-Signal (AMS) circuits. The interface of the BIST is fully digital. This approach is aimed at facilitating low-cost test techniques for System-on-Chip (SoC) devices, rendering the test of mixed-signal cores compatible with the use of a low-cost digital tester. Analogue test signal generation is performed on-chip by low pass filtering a Sigma-Delta encoded bit-stream. Analogue harmonic test response analysis is also performed on-chip using square wave modulation and Sigma-Delta modulation. Since both analogue signal generation and test response analysis are digitally programmable on-chip, compatibility with a low-cost digital tester is ensured. Optimisation of test signatures is discussed in detail as a trade-off between test time and test quality.
keyword : Analog Design
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https://tel.archives-ouvertes.fr/tel-00011327
Contributor : Lucie Torella <>
Submitted on : Monday, January 9, 2006 - 3:32:54 PM
Last modification on : Tuesday, January 15, 2019 - 11:06:07 AM
Long-term archiving on : Saturday, April 3, 2010 - 9:00:41 PM

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  • HAL Id : tel-00011327, version 1

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Guillaune Prenat. Conception d'une architecture de BIST analogique et mixte programmable en technologie CMOS très submicronique. Micro et nanotechnologies/Microélectronique. Institut National Polytechnique de Grenoble - INPG, 2005. Français. ⟨tel-00011327⟩

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