Modélisation et validation des systèmes hétérogènes : définition d'un modèle d'exécution

Abstract : Systems on chip are an assembly of heterogeneous components. Their design needs two steps: components design and components integration. The integration process needs (1) a multidisciplinary and deep conceptual skills, (2) a global model for the description of the components and their integration and (3) a suitable global environment that allows fast and effective validation of heterogeneous systems. However, this design seems to be complicated and tedious work.
Our work is to generalize concepts of modeling and validation process of heterogeneous systems on chip in order to assist integration process and components assembly. This generalization is focused on (1) common concepts of modeling heterogeneous systems before synthesizes process (for simulation, execution etc.) and (2) definition of global execution model for validation of heterogeneous systems. The proposed concepts were validated using complex applications: a car information card, an audio tool chain 802.16 modem and a software defined radio system.
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Contributor : Lucie Torella <>
Submitted on : Friday, December 16, 2005 - 12:06:58 PM
Last modification on : Wednesday, May 16, 2018 - 6:30:04 PM
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  • HAL Id : tel-00011219, version 1

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L. Kriaa. Modélisation et validation des systèmes hétérogènes : définition d'un modèle d'exécution. Autre [cs.OH]. Université Joseph-Fourier - Grenoble I, 2005. Français. ⟨tel-00011219⟩

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