, Il est compos e de deux parties : , La premi ere concerne la base de donn ees qui contient les structures de donn ees internes manipul ees par les dii erents modules de l'outil. Elle comprend la repr esentation des entit es a traiter circuits, ainsi que les informations re cues des outils externes de test
, Combinational Prooles of Sequential Benchmark Circuits, Proc. IEEE ISCAS, pp.1929-1934, 1989.
, 1-1990 on boundary scan : History, litterature survey, and current status, IEEE Standard Journal of Electronic Testing : Theory and Applications Special issue on Boundary Scan, vol.1149, issue.1, pp.11-25, 1991.
, Hitest : A Knowledge-Based Test Generation System, IEEE Design & Test of Computers, V ol, vol.1, pp.83-92, 1984.
, Progress in Design for Test: A Personal View, IEEE Design and Test of Computers, pp.53-59, 1994.
, Selecting uncertainty calculi and granularity: An example in trading-oo and complexity, pp.217-247, 1986.
, Fault Dictionary Compaction by Output Sequence Removal, Proc. Intl. Conf. on Computer-Aided Design, pp.576-579, 1994.
, A Neutral Netlist of 10 Combinational Benchmark Circuits and a Target Translator in Fortran, Proc. Intl. Test Conference, pp.785-794, 1985.
, An application of Automata Theory to sequential ATPG, IEEE European Test Conference, 1991.
, Special section on reasoning about structure, behavior and function -introduction, SIGART Newsletter 1, 93, 1985.
, CAD and Testing of ICs and Systems : where are we going?, Research Report, 1994.
URL : https://hal.archives-ouvertes.fr/hal-00007940
, Structuration du raisonnement et explications" , Revue D'Intelligence A rtiicielle, V ol, pp.77-88, 1988.
, Representing structure and behavior of digital hardware, IEEE Computer journal, pp.75-82, 1983.
, Diagnostic reasoning based on structure and behavior". Artiicial intelligence, V ol 24, pp.347-410, 1984.
, Monolithic or MultiChip, pp.24-26, 1992.
, Qualitative Process Theory, Artiicial Intelligence Vol, vol.24, 1984.
, Known Good Die, 1995.
, Testing of glue logic interconnects using boundary scan architecture, Proceedings. 'Meeting the Tests of Time'., International Test Conference, pp.700-711, 1989.
DOI : 10.1109/TEST.1989.82358
, Napoli Le Raisonnement e n I n telligence Artiicielle, 1991.
, Testing and diagnosis of interconnects using boundary scan architecture, International Test Conference 1988 Proceeding@m_New Frontiers in Testing, pp.254-265, 1988.
DOI : 10.1109/TEST.1988.207790
, High-Yield Assembly of Multi-Chip Modules through Known-Good IDs and EEective T est Strategies, Proceedings of the IEEE, pp.1965-1994, 1992.
, Testing Conventional Logic and Memory Clusters using Boundary Scan Devices as Virtual ATE Channels, International Test Conference, pp.166-173, 1989.
, A New Framework for Analyzing Test Generation and Diagnosis Algorithms for Wiring Interconnects, International Test Conference, pp.63-70, 1989.
, Testing for faults in Wiring Networks, IEEE Transactions on Computers, vol.23, issue.4, pp.358-363, 1974.
, Diagnosing multiple faults, Artiicial intelligence, V ol 32, pp.97-130, 1987.
, Neural Networks and Fuzzy Systems, 1991.
, Reasoning with qualitative models, Artiicial Intelligence, p.59, 1993.
, Cost EEectiveness of nCHIP's MCM Technology, MultiChip Module Workshop, pp.16-23, 1991.
, A pragmatic test and diagnosis methodology for partially testable MCMs, Proceedings of IEEE Multi-Chip Module Conference (MCMC-94), pp.108-113
DOI : 10.1109/MCMC.1994.292518
, Veriication testingga pseudo-exhaustive test technique, IEEE Trans. on Computers, issue.33, pp.541-546, 1984.
, COUPLING ELECTRON-BEAM PROBING WITH KNOWLEDGE-BASED FAULT LOCALIZATION, 1991, Proceedings. International Test Conference, pp.238-247, 1991.
DOI : 10.1109/TEST.1991.519515
URL : https://hal.archives-ouvertes.fr/hal-00007960
, Unifying test and diagnosis of interconnects and logic clusters in partial boundary scan boards, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD), pp.654-657, 1993.
DOI : 10.1109/ICCAD.1993.580156
, FLAMES: A fuzzy logic ATMS and model-based expert system for analog diagnosis, Proceedings ED&TC European Design and Test Conference, 1996.
DOI : 10.1109/EDTC.1996.494158
, Knowledge-based debugging of ASICs : real case study and performance analysis, Proc. Intl. Conf. on Computer-Aided Design, 1991.
, Model-Based Reasoning for Electron-Beam Debugging of VLSI Circuits, Journal of Electronic Testing: Theory and Applications, vol.2, pp.385-394, 1991.
, Test and Diagnosis of Analog Devices : When Fuzziness can lead to Accuracy, Journal of Electronic Testing : Theory and Applications
, G en eration de vecteurs de test par ordonnancement, 1995.
, Proofs, Conference proceedings on 27th ACM/IEEE design automation conference , DAC '90, pp.198-206, 1992.
DOI : 10.1145/123186.123396
, Applications of fuzzy Sets to Systems Analysis, 1975.
, HITEC : A Test Generation Package for Sequential Circuits, European Design Automation Conference, 1991.
, The Boundary Scan Handbook, 1992.
, An improved constraint propagation algorithm for diagnosis, International Joint Conference o n A I, pp.1105-1111, 1987.
, A constraint-propagation approach to probabilistic reasoning", machine Intelligence and Pattern Recognition n o 4 : Uncertainly in Artiicial Intelligence, Editors L. N. LAKANAL & J. F. LEMMER, 1988.
, Product Data Sheet, PM 3790 BSD Boundary Scan Diagnostics, 1993.
, On the Generation of small Dictionaries for Fault Location, Proc. Intl. Conf. on Computer-Aided Design, pp.272-279, 1992.
, Artiicial Intelligence in Maintenance : Synthesis of Technical Issues, 1985.
, The Modern Fault Dictionary, International Test Conference, pp.696-702, 1985.
, Interconnect Testing of Boards with Partial Boundary Scan, International Test Conference, pp.572-581, 1990.
, HITEST-Intelligent T est Generation, International Test Conference, pp.311-323, 1983.
, Diagnosing Continuos Dynamic Systems Using Qualitative Simulation, Proc. of the Fifth National Conf. on Control, 1991.
, Fuzzy Sets and Their Applications": Selected Papers by L, A.Zadeh, Artiicial Intelligence, vol.61, pp.351-358, 1993.
, Board Test DFT Model for Computer Products, International Test Conference, pp.367-371, 1992.
, System fault diagnosis based on a fuzzy qualitative approach, Proceedings ED&TC European Design and Test Conference, 1996.
DOI : 10.1109/EDTC.1996.494380
, Implantation et Validation de la m ethode de Simpliication de Graphe sur les Benchmarks S equentiels, 1992.
, Test program pseudocode, European Test Conference, P aris, pp.106-111, 1989.
, Failure Diagnosis on Structured VLSI, IEEE Design and Test of Computers, pp.49-60, 1989.
, Interconnect Testing with Boundary Scan, International Test Conference, pp.52-57, 1987.
, Voltage Contrast Electron Beam Tester for Testing Unpopulated MCMs, Hybrid Circuit Technology, pp.20-27, 1991.
, A Strategy for diagnosis based on empirical and model knowledge", journ ees des syst emes experts, pp.835-848, 1986.
, Fuzzy Sets, Information and Control, pp.338-353, 1965.
, A Universal Testability Strategy for Multi-Chip Modules Based on BIST and Boundary Scan, International Conference on Computer Design, pp.59-66, 1992.
, Design and Test of MCMs, European Design and Test Conference , TUTORIAL D, 1995.