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Une Méthodologie de Conception de Circuits Asynchrones à Faible Consommation d'Energie: Application au Microprocesseur MIPS

Abstract : To increase the autonomy of embedded systems such as portable phones or computers, several researches on integrated circuit design have been performed in order to reduce the energy consumption. This Phd work aims at proposing to the designer the means to design low energy digital integrated circuits. Three important steps have been proposed in this work to reduce the energy consumption of circuits. The first step is to use asynchronous logic to design circuit. Indeed, several works achieved these last years have shown that asynchronous logic can significantly reduce the energy consumption of circuits. The second step is to offer tools that allow the designer to get information on the activity and the energy consumption of a circuit during the design flow. An activity estimator and an energy estimator have been specified that allow the designer to get relevant information on the distribution of the activity and the energy within a circuit during a specific simulation. Finally, optimisation techniques have been defined to reduce the energy consumption of circuits. The estimation methodology and the energy consumption optimisation techniques have been applied to the implementation of a processor. The results have shown an energy consumption reduction of 24%.
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https://tel.archives-ouvertes.fr/tel-00008328
Contributor : Lucie Torella <>
Submitted on : Wednesday, February 2, 2005 - 11:08:12 AM
Last modification on : Friday, December 11, 2020 - 8:28:04 AM
Long-term archiving on: : Friday, April 2, 2010 - 8:56:34 PM

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  • HAL Id : tel-00008328, version 1

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TIMA | CNRS | UGA

Citation

K. Slimani. Une Méthodologie de Conception de Circuits Asynchrones à Faible Consommation d'Energie: Application au Microprocesseur MIPS. Micro et nanotechnologies/Microélectronique. Institut National Polytechnique de Grenoble - INPG, 2004. Français. ⟨tel-00008328⟩

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