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Une approche structurelle et comportementale de modélisation pour la vérification de composants VLSI

Abstract : The manuscript describes a modeling and validation methodology for the design of microprogrammed circuits that implement network communication protocols. The method was developped in the framework of the FICOMP project, which implement the FIELDBUS protocol standard. The first chapter describes the industrial context of the project, the various specification levels for the circuit, and the simulation and verification tools at hand. Chapter two presents the VOVHDL langage, an extension of VHDL for the specification of communication and synchronisations among concurrent processes ; a synchronous semantics in terms of labeled transitions systems is given for VOVHDL. Chapter three presents a modeling approach for hierarchical VOVHDL descriptions, and shows its application to the FICOMP circuit : internal modules are interconnected with a communication module to build a higher level module; this model is then translated into the input format of the ASA+ verification software. Chapter four recalls the essential features of VHDL and formalize its simulation semantics in terms of labeled transition systems. The application of the methodology to the specification of two modules of the FICOMP circuit, and their translation into the proposed model, are detailed in the appendices.
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Contributor : Thèses Imag <>
Submitted on : Tuesday, February 24, 2004 - 9:12:51 AM
Last modification on : Friday, November 6, 2020 - 3:55:30 AM
Long-term archiving on: : Friday, September 14, 2012 - 11:25:08 AM


  • HAL Id : tel-00005027, version 1




Catherine Bayol. Une approche structurelle et comportementale de modélisation pour la vérification de composants VLSI. Autre [cs.OH]. Université Joseph-Fourier - Grenoble I, 1995. Français. ⟨tel-00005027⟩



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