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Calcul des capacités parasites dans les interconnexions des circuits intégrés par une méthode de domaines fictifs

Abstract : This thesis presents an efficient method for the computation of parasitic capacitance due to the interconnects in integrated circuits. For this, we calculate the charge on the conductors, by the normal derivative of the potential on the surfaces of conductors. The potential is solution of Laplace equation in horizontal layers, with Dirichlet boundary conditions on the surfaces of conductors. The difficulty of this computation comes from the geometric complexity : a portion of circuit of surface one square centimetre, and height a few microns, can contain more than a kilometre of interconnects, that is of conductor wires. A fictitious domain method with Lagrange multiplier is used. It leads to a mixed formulation of the problem, that couples the potential in a parallelepiped embedding the circuit, and the charge on the surfaces of conductors. We propose an approximation that takes into account the jump of the gradient of potential across the surfaces of conductors in the discretization of the potential, while leading to a system that can be solved using a fast solver. The charge is thus computed with a good accuracy, without restricting compatibility conditions on surface and volume meshes. The method has been implemented for two and three - dimensional problems, and tested on real structures. Thus, the accuracy and computational efficiency of the method have been validated, in comparison to existing methods.
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Submitted on : Monday, February 16, 2004 - 6:22:37 PM
Last modification on : Thursday, June 11, 2020 - 5:04:04 PM
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  • HAL Id : tel-00004700, version 1



Sylvie Putot. Calcul des capacités parasites dans les interconnexions des circuits intégrés par une méthode de domaines fictifs. Modélisation et simulation. Université Joseph-Fourier - Grenoble I, 2001. Français. ⟨tel-00004700⟩



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