, 31 II.4.6. Capacité limitée d'utiliser un IP dans le processus de synthèse d'architecture 32 II.5. Conclusion The rest of the paper is organized as follows. Section II presents some basic concepts adopted and introduces our methodology, Section III details the design and validation steps of the methodology and the associated design flow. Section IV presents the experimental results
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, les macro-cellules ASIC dédiées au traitement du signal deviennent de plus en plus complexes, coûteuses en temps et efforts de conception. Ces macro-cellules seront ensuite assemblées avec d'autres composants IPs (e.g. processeurs, mémoires, média de communication, etc.) pour être intégrées dans un
, Les procédés de conception deviennent insuffisants pour conserver la maîtrise de la complexité (d'un point de vue aussi bien algorithmique qu'architectural) des nouvelles applications tout en