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Test intégré pour Convertisseurs Analogique/Numérique

Serge Bernard 1
1 SysMIC - Conception et Test de Systèmes MICroélectroniques
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : The mixed-signal circuits developed for the new multimedia applications include analog blocks and digital blocks. In an industrial context, the Analog-to-Digital Converters (ADC) are tested with a functional approach (histogram, FFT) by using expensive external test equipment. An attractive solution to reduce the cost of the test consists in moving some or all the tester functions onto the chip itself. The objective of the work presented in this thesis is the design and the development of architectures for histogram-based ADC Built-In-Self-Test (BIST). The straightforward implementation of the histogram test technique requires a significant silicon area overhead. In order to reduce this area, we propose original solutions based on the time decomposition of the histogram-based test. With this approach and simplifications of calculations, we can reduce the required hardware resources (memories, calculation). Finally, to make this BIST structure complete, we design an original architecture of ramp and triangular-wave generator. These generators use a corrective scheme to generate an accurate signal which is insensitive to the process variations. Furthermore they exhibit a very low area overhead.
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Contributor : Bernard Serge <>
Submitted on : Friday, October 31, 2003 - 10:02:29 AM
Last modification on : Tuesday, January 5, 2021 - 4:00:04 PM
Long-term archiving on: : Wednesday, September 12, 2012 - 11:15:17 AM


  • HAL Id : tel-00003665, version 1



Serge Bernard. Test intégré pour Convertisseurs Analogique/Numérique. Micro et nanotechnologies/Microélectronique. Université Montpellier II - Sciences et Techniques du Languedoc, 2001. Français. ⟨tel-00003665⟩



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