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Theses

Conception des interfaces logiciel-matériel pour l'intégration des mémoires globales dans les systèmes monopuces

Abstract : Embedded memory is becoming a new paradigm allowing entire systems to be built on a single chip. In the near future, new developments in process technology will allow the integration of more than 100 Mbits of DRAM and 200 millions gates of logic onto the same chip. According to Semiconductor Industry Association and ITRS prevision, embedded memory will continue to dominate SoC content in the next several years, approaching 94% of the die area by year 2014.
Memory Reuse based design is emerging to close the gap between this steadily increasing capacity and the design productivity in terms of designed transistors per time unit. This solution can be ideal in the case of homogeneous architecture where all the components have the same interfaces and use the same communication protocols, which is not the case for system on chip. However, the integration of several memory IP into a system on a chip makes specification and implementation of hardware-software interfaces a dominant design problem. Indeed, memory interface design is still hand-made, it is time-consuming and it is error prone. For these raisons, the design automation of these memory interfaces becomes crucial.
The contribution of this thesis consists on systematic method of hardware-software interfaces design for global memory. These interfaces correspond to flexible hardware wrappers connecting the memory to the communication network, and software drivers adapting the application software to the target processors. Experiments on image processing applications confirmed a saving of significant design time and proved the flexibility as well as the weak communication and the area overhead.
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https://tel.archives-ouvertes.fr/tel-00003092
Contributor : Lucie Torella <>
Submitted on : Monday, July 7, 2003 - 10:34:32 AM
Last modification on : Thursday, March 26, 2020 - 9:30:05 AM
Document(s) archivé(s) le : Friday, April 2, 2010 - 6:34:17 PM

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  • HAL Id : tel-00003092, version 1

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TIMA | CNRS | UGA

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F. Gharsalli. Conception des interfaces logiciel-matériel pour l'intégration des mémoires globales dans les systèmes monopuces. Réseaux et télécommunications [cs.NI]. Institut National Polytechnique de Grenoble - INPG, 2003. Français. ⟨tel-00003092⟩

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