V. Génération-d-'interfaces-de-cosimulation, 37 3.6.1 Flot pour la génération d'interfaces C, p.39

C. Le-contrôleur-de-moteurs, Application à la cosimulation, p.46

V. Prototyping and .. , 55 4.1.1 Objectives, p.56

.. Design-models-used-by-cosmos, 73 5.3.1 Target architecture, p.73

C. Modeling and R. , 77 Communication model, p.78

.. Communication, 78 Protocol Selection and Communication Unit Allocation, p.78

.. Design, 84 Functional decomposition primitives

C. Etápe-de-génération-de-code and .. De-contrôle-de-moteur, 120 7.1.1 Description Solar de l'exemple 120 7.1.2 Description Solar comportementale pour un module logiciel : moteur2 (algo2) 123 7.1.3 Description Solar comportementale pour un module matériel : le controleur de vitesse (control) 123 7.1.4 Description VHDL structurelle : structure plus configuration des instances 129 7.1.6 Description du package VHDL pour les types introduits par l'unité de communication Description C des procédures de communication utilisées par le module logiciel : moteur1 (algo1).. 134 7.1.9 Description de l'interface du module logiciel pour la cosimulation (fichier VCI) : moteur1 (algo1) Fichier C généré automatiquement par VCI pour la cosimulation avec le module logiciel Fichier VHDL généré automatiquement par VCI pour l'encapsulation d'un module logiciel : moteur1 (algo1), p.142

M. Strik and J. Van-meerbergen, Efficient code generation for in-house DSP-cores, Proceedings the European Design and Test Conference. ED&TC 1995, pp.244-249, 1995.
DOI : 10.1109/EDTC.1995.470388

P. Lapsley, NSP Show Promise on Pentium, PowerPC, Microprocessor Report, pp.11-15, 1995.

M. Slater, System Architects Look to the Future, pp.22-24, 1995.

N. Gehani, C : An Advanced Introduction, ANSI C Edition, 1988.

I. Bolsens, Specification, Cosimulation and Hardware/Software Interfacing for Telecom Systems, Leuwen Codesign Course, 1997.

P. G. Paulin, J. Fréhel, M. Harrand, E. Berrebi, C. Liem et al., High-level synthesis and codesign methods: An application to a Videophone Codec, Proceedings of EURO-DAC. European Design Automation Conference, 1995.
DOI : 10.1109/EURDAC.1995.527442

C. Valderrama, F. Naçabal, P. Paulin, and A. Jerraya, Automatic generation of interfaces for distributed C-VHDL cosimulation of embedded systems: an industrial experience, Proceedings Seventh IEEE International Workshop on Rapid System Prototyping. Shortening the Path from Specification to Prototype, pp.72-77, 1996.
DOI : 10.1109/IWRSP.1996.506730

URL : https://hal.archives-ouvertes.fr/hal-00008130

C. Valderrama, A. Changuel, and A. Jerraya, Virtual Prototyping for Modular and Flexible Hardware/Software Systems, Journal of Design Automation for Embedded Systems, vol.24, issue.3, 1997.
URL : https://hal.archives-ouvertes.fr/hal-00008115

C. A. Valderrama, A. Changuel, P. V. Raghavan, M. Abid, T. B. Ismail et al., A Unified Model for Cosimulation and Cosynthesis of Mixed Hardware/Software Systems, Proc. of the European Design and Test Conference ED&TC'95, 1995.
URL : https://hal.archives-ouvertes.fr/hal-01467291

W. Wolf, Guest Editor???s Introduction, International Journal of Political Economy, vol.2, issue.3, p.5, 1993.
DOI : 10.1080/08911916.1999.11643992

E. Walkup and G. Boriello, Automatic Synthesis of Device Drives for Hardware-Software Codesign " , Int'l. Workshop on Hardwaer-Software Codesign, 1993.

G. Boriello, K. Buchenrieder, R. Camposano, E. Lee, R. Waxman et al., Hardware/Software Codesign, IEEE Design & Test of Computers, pp.83-91, 1993.

K. Keutzer, hardware-Software Codesign and ESDA, Proc. 31st Design Automation conference (DAC), pp.435-436, 1994.

M. Voss, T. B. Ismail, A. Jerraya, and K. Kapp, Towards a theory for hardware/software codesign, Third International Workshop on Hardware/Software Codesign, pp.173-180, 1994.
DOI : 10.1109/HSC.1994.336709

URL : https://hal.archives-ouvertes.fr/hal-00008150

M. A. Richards, The Rapid Prototyping of Application Specific Signal Processors (RASSP) program: overview and status, Proceedings of IEEE 5th International Workshop on Rapid System Prototyping, pp.1-6, 1994.
DOI : 10.1109/IWRSP.1994.315915

W. Glunz, T. Kruse, T. Rossel, and D. Monjau, Integrating SDL and VHDL for System-Level Hardware Design, Proc. IFIP Conf. Hardware Description Languages (CHDL), Plub, 1993.
DOI : 10.1016/B978-0-444-81641-2.50021-6

T. B. Ismail and A. Jerraya, Synthesis steps and design models for codesign, Computer, vol.28, issue.2, pp.44-52, 1995.
DOI : 10.1109/2.347999

URL : https://hal.archives-ouvertes.fr/hal-00008146

H. De-man, I. Bolsens, B. Lin, K. Van-rompaey, S. Vercauteren et al., Co-design for DSP systems, NATO ASI Hardware/Software Codesign, 1995.

G. Cambon, C. Vial, L. Maillet-contoz, and L. Torres, Environnement d'aide à la Conception Concurrente de Systèmes Dédiés Matériel/Logiciel, 1995.

V. Madisetti, T. Egolf, S. Famorzadeh, and L. Dung, Virtual prototyping of embedded DSP systems, 1995 International Conference on Acoustics, Speech, and Signal Processing, 1995.
DOI : 10.1109/ICASSP.1995.480121

A. Kalavade and E. A. Lee, A hardware-software codesign methodology for DSP applications, IEEE Design & Test of Computers, vol.10, issue.3, pp.16-28, 1993.
DOI : 10.1109/54.232469

A. Kalavade and E. A. Lee, The Extended Partitioning Problem: Hardware/Software Mapping, Scheduling, and Implementation-bin Selection, Proceedings of Sixth International Workshop on Rapid Systems Prototyping, pp.12-18, 1995.
DOI : 10.1016/B978-155860702-6/50027-2

K. Kim, Y. Kim, Y. Shin, K. Choi, and S. Ha, An Integrated Hardware-Software Cosimulation Environment with Automated Interface Generation, Proc. Of 7th IEEE Int'l Workshop on Rapid System Prototyping, pp.66-71, 1996.

R. Ernst, J. Henkel, . Th, W. Benner, U. Ye et al., The COSYMA Environment for Hardware/Software Cosynthesis, Journal of Microprocessors and Microsystems, 1995.

A. Österling, T. Benner, R. Ernst, D. Herrmann, T. Scholz et al., The Cosyma System, Hardware /Software Co-Design: Principles and Practice, pp.263-305, 1997.

G. Goossens, I. Bolsens, B. Lin, and F. Catthoor, Design Of Heterogeneous Ics For Mobile And Personal Communication Systems, IEEE/ACM International Conference on Computer-Aided Design, pp.524-531, 1994.
DOI : 10.1109/ICCAD.1994.629872

K. Van-rompaey, D. Verkest, I. Bolsens, and H. De-man, CoWare-a design environment for heterogeneous hardware/software systems, Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition, p.252, 1996.
DOI : 10.1109/EURDAC.1996.558213

S. Antoniazzi, A. Balboni, W. Fornaciari, and D. Sciuto, A methodology for control-dominated systems codesign, Third International Workshop on Hardware/Software Codesign, pp.2-9, 1994.
DOI : 10.1109/HSC.1994.336729

M. Romdhani, R. P. Hautbois, A. Jeffroy, P. Chazelles, and A. A. Jerraya, Evaluation and composition of specification languages, an industrial point of view, Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair, pp.519-523, 1995.
DOI : 10.1109/ASPDAC.1995.486364

URL : https://hal.archives-ouvertes.fr/hal-00008135

J. M. Daveau, G. F. Marchioro, C. A. Valderrama, and A. A. Jerraya, VHDL Generation from SDL Specification, Proceedings of CHDL, pp.182-201
URL : https://hal.archives-ouvertes.fr/hal-00016246

C. Delgado-kloss and M. Lopez, From Lotos to VHDL, Current Issues in Electronic Modelling, vol.3, 1995.

R. K. Gupta and G. D. Micheli, System-level synthesis using re-programmable components, [1992] Proceedings The European Conference on Design Automation, pp.2-7, 1992.
DOI : 10.1109/EDAC.1992.205881

J. Madsen and J. Brage, Codesign analysis of a computer graphics application, Design Automation for Embedded Systems, vol.27, issue.1, 1996.
DOI : 10.1007/BF00134685

M. Theibinger, P. Stravers, and H. Veit, CASTLE: an interactive environment for hardware-software co-design, Proceedings of International Workshop on Hardware-Software Co-Design, pp.203-210, 1994.

W. Wolf, Hardware-Software Co-Design of Embedded Systems, Proceedings of the IEEE, pp.967-989, 1994.

L. Lavagno, A. Sangiovanni-vicentelli, and H. Hsieh, Embedded System Codesign: Synthesis and Verification, Hardware/Software Codesign, pp.213-242, 1996.

G. Berry, A hardware implementation of pure ESTEREL, Proceedings of the ACM Workshop on Formal Methods in VLSI Design, 1991.
DOI : 10.1007/BF02811340

URL : https://hal.archives-ouvertes.fr/inria-00075083

D. Gajski, F. Vahid, S. Narayan, and J. Gong, Specification and Design of Embedded Systems, 1994.

F. Vahid, S. Narayan, and D. Gajski, SpecCharts: a VHDL front-end for embedded systems, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.14, issue.6, pp.694-700, 1995.
DOI : 10.1109/43.387730

M. Barbacci, Instruction set processor specifications (ISPS): The notation and its applications, IEEE Transactions on Computers, vol.30, issue.1, pp.24-40, 1981.
DOI : 10.1109/TC.1981.6312154

D. Ku and G. D. Micheli, HardwareC, a Language for Hardware Design, 1988.

G. Holzmann, Design and Validation of Computer Protocols, 1991.

R. Saracco and P. A. Tilanus, CCITT SDL: Overview of the language and its applications, Computer Networks and ISDN Systems, vol.13, issue.2, pp.65-74, 1987.
DOI : 10.1016/0169-7552(87)90091-2

S. Budowki and P. Dembinski, An Introduction to Estelle: A Specification Language for Distributed Systems, Computer Networks and ISDN Systems, vol.13, issue.2, pp.2-23, 1987.

N. Halbwachs, F. Lagnier, and C. , Programming and verifying real-time systems by means of the synchronous data-flow language LUSTRE, IEEE Transactions on Software Engineering, vol.18, issue.9, 1992.
DOI : 10.1109/32.159839

T. Gautier and P. Guernic, SIGNAL: A declarative language for synchronous programming of real-time systems, Computer Science, Formal Languages and Computer Architectures, vol.274, 1987.
DOI : 10.1007/3-540-18317-5_15

URL : https://hal.archives-ouvertes.fr/inria-00075791

J. Peterson, Petri Net Theory and the Modeling of Systems, Englewood Cliffs, N.J, 1981.

R. Milner, Calculi for synchrony and asynchrony, Theoretical Computer Science, vol.25, issue.3, pp.267-310, 1983.
DOI : 10.1016/0304-3975(83)90114-7

C. Jones, Systematic Software Development Usign VDM, International Series in Computer Science, 1990.

J. Spivey, An introduction to Z and formal specifications, Software Engineering Journal, vol.4, issue.1, pp.40-50, 1989.
DOI : 10.1049/sej.1989.0006

J. Bruijnin, Evaluation and Integration of Specification Languages, Computer Networks and ISDN Systems, vol.13, issue.2, pp.75-89, 1987.

G. Koch, U. Kebshull, and W. , A prototyping environment for hardware/software codesign in the COBRA project, Third International Workshop on Hardware/Software Codesign, pp.10-16, 1994.
DOI : 10.1109/HSC.1994.336728

D. Gajski and F. Vahid, Specification and design of embedded hardware-software systems, IEEE Design & Test of Computers, vol.12, issue.1, pp.53-67, 1995.
DOI : 10.1109/54.350695

K. Buchenrieder, A. Sedlmeier, and C. Veith, Hw/Sw Codesign with PRAMs Using COdes, Proc. IFIP Conf. Hardware Description Languages, pp.55-68, 1993.

X. Lavarenne, O. Seghrouchni, Y. Sorel, and M. Sorine, TheSynDex Software Environment for Real-time Distributed Systems Design and Implementation, Proc. European Control Conference, 1991.

D. Gajski, J. Zhu, and R. Dömer, Essential Issues in Codesign Hardware/Software Co-Design: Principles and Practice, pp.1-44, 1997.

J. Buck, S. Ha, and E. Lee, Ptolemy: A Framework for Simulating and Prototyping Heterogeneous Systems, International Journal of Computer Simulation, 1994.
DOI : 10.1016/B978-155860702-6/50048-X

T. B. Ismail, K. O-'brien, and A. A. Jerraya, PARTIF: Interactive System-level Partitioning, VLSI Design, vol.3, issue.3-4, pp.333-345, 1995.
DOI : 10.1155/1995/28167

URL : https://hal.archives-ouvertes.fr/hal-00008026

D. Gajski, F. Vahid, and S. Narayan, A system-design methodology: executable-specification refinement, Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC, pp.458-463, 1994.
DOI : 10.1109/EDTC.1994.326836

M. Srivastava and R. Brodersen, SIERA: a unified framework for rapid-prototyping of system-level hardware and software, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.14, issue.6, pp.676-693, 1995.
DOI : 10.1109/43.387729

W. Wolf, Object-oriented co-synthesis of distributed embedded systems, Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair, 1995.
DOI : 10.1109/ASPDAC.1995.486369

E. Barros, W. Rosentiel, and X. Xiong, A Method for Partitioning UNITY Language in Hardware and Software, Proc.of European Design Automation Conf. (Euro-DAC), 1994.

E. D. Lagnese and D. E. Thomas, Architectural partitioning for system level synthesis of integrated circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.10, issue.7, pp.847-860, 1991.
DOI : 10.1109/43.87596

F. Vahid and D. D. Gajski, Specification partitioning for system design, [1992] Proceedings 29th ACM/IEEE Design Automation Conference, 1992.
DOI : 10.1109/DAC.1992.227833

W. Hardt and R. Camposano, Specification Analysis for HW/SW -Partitioning, 1995.

D. Lanneer, J. Vanpraet, W. Geurts, and G. Goossens, Chess : Retargetable Code Generation for Embedded DSP Processors, Code Generation for Embedded Processors, 1995.
DOI : 10.1007/978-1-4615-2323-9_5

P. Marwedel and G. Goessens, Code Generation for Embedded Processors (DSP), 1995.

A. Alomary, T. Nakata, and Y. Honma, An ASIP instruction set optimization algorithm with functional module sharing constraint, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD), pp.526-532, 1993.
DOI : 10.1109/ICCAD.1993.580109

R. Gupta and G. D. Micheli, Hardware-software cosynthesis for digital systems, IEEE Design & Test of Computers, vol.10, issue.3, pp.29-41, 1993.
DOI : 10.1109/54.232470

K. Buchenrieder, A Prototyping Environment for Control-Oriented HW/SW Systems using StateCharts, Activity-Charts and FPGA's, Proc. Euro-DAX with Euro-VHDL, pp.60-65, 1994.

P. Camurati, F. Corno, P. Prinetto, C. Bayol, and B. Soulas, System-level modeling and verification: a comprehensive design methodology, Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC, 1994.
DOI : 10.1109/EDTC.1994.326811

T. Yen and W. Wolf, Communication synthesis for Distributed Embedded Systems, Proceedings, ICCAD-95, pp.64-69, 1995.

M. Chiodo, D. Engels, P. Giusto, H. Hsieh, A. Jurecska et al., A case study in computer-aided co-design of embedded controllers, Design Automation for Embedded Systems, vol.24, issue.5, pp.51-67, 1996.
DOI : 10.1007/BF00134683

J. Gong, D. Gajski, and S. Narayan, Software Estimation from Executable Specifications, Proc. European Design & Automation Conference (EuroDAC), 1994.

B. Lin, S. Vercauteren, and H. D. Man, Embedded Architecture Cosynthesis and System Integration, Proceedings, Fourth International Workshop on Hardware/Software Codesign, pp.2-9, 1996.

D. Gajski and F. Vahid, Specification and Design of Embedded Systems, IEEE Design & Test fo Computers, pp.53-67, 1995.

P. Paulin, C. Liem, T. May, and S. Sutarwala, DSP design tool requirements for embedded systems: A telecommunications industrial perspective, Journal of VLSI Signal Processing (special issue on synthesis for real-time DSP), 1994.
DOI : 10.1007/BF02406469

A. A. Jerraya and K. O-'brien, Solar: an intermediate format for system-level modeling and synthesis, Computer-Aided Software/Hardware Engineering, 1994.

P. Paulin, M. Cornero, C. Liem, F. Naçabal, C. Donawa et al., Trends In Embedded Systems Technology, Hardware/Software Co-design, 1996.
DOI : 10.1007/978-94-009-0187-2_13

URL : https://hal.archives-ouvertes.fr/hal-01466207

C. W. Krueger, Software reuse, ACM Computing Surveys, vol.24, issue.2, pp.131-183, 1992.
DOI : 10.1145/130844.130856

D. Gajski, F. Vahid, S. Narayan, and J. Gong, Specification and Design of Embedded Systems, 1994.

A. Changuel, R. Rolland, and A. A. Jerraya, Design of an Adaptative Motors Controller based on Fuzzy Logic using Behavioural Synthesis, Proc. European DAC with EURO-VHDL 96, pp.48-52, 1996.

M. Abid, A. Changuel, and A. Jerraya, Exploration of hardware/software design space through a codesign of robot arm controller, Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition, pp.42-47, 1996.
DOI : 10.1109/EURDAC.1996.558055

URL : https://hal.archives-ouvertes.fr/hal-00008022

G. R. Andrews, Concurrent Programming, Principles and Practice, pp.484-494, 1991.

K. Hagen and H. Meyer, Timed and Untimed Hardware/Software Cosimulation: Application and Efficient Implementation, International Workshop on Hardware-Software Codesign, 1993.

T. B. Ismail, M. Abid, K. O-'brien, and A. Jerraya, An approach for hardware-software codesign, Proceedings of IEEE 5th International Workshop on Rapid System Prototyping, 1994.
DOI : 10.1109/IWRSP.1994.315907

URL : https://hal.archives-ouvertes.fr/hal-00008032

A. Kalavade and E. Lee, A Hardware-Software Codesign Methodology for DSP Applications, IEEE Design and Test of Computers, pp.16-28, 1993.

D. Thomas, J. Adams, and H. Schmit, A model and methodology for hardware-software codesign, IEEE Design & Test of Computers, vol.10, issue.3, pp.36-51, 1993.
DOI : 10.1109/54.232468

H. Fleukers and J. Jess, ESCAPE: A Flexible Design and Simulation Environment, Proc. of The Synthesis and Simulation Meeting and International Interchange, SASIMIÕ93, pp.277-288, 1993.

R. Gupta, C. Coelho, and G. D. Micheli, Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components, Proc. 29th Design Automation Conf, pp.225-234, 1992.

W. Loucks, B. Doray, and D. Agnew, Experiences in Real Time Hardware-Software Cosimulation, Proc VHDL Int. Users Forum (VIUF), pp.47-57, 1993.

S. Lee and J. Rabaey, A Hardware Software Cosimulation Environment, International Workshop on Hardware-Software Codesign, 1993.

N. Rethman and P. Wilsey, RAPID: A Tool for Hardware/ Software Tradeoff Analysis, Proc. CHDL'93, 1993.

D. Becker, R. Singh, and S. , An Engineering Environment for Hardware/Software Cosimulation, Proc. Design Automation Conference ACM, pp.129-134, 1992.

K. O-'brien, T. B. Ismail, and A. Jerraya, A Flexible Communication Modeling Paradigm for System-level Synthesis, International Workshop on Hardware-Software Codesign, 1993.

D. Ungar, R. Smith, U. Chambers, and . Holzle, Object, message, and performance: how they coexist in Self, Computer, vol.25, issue.10, 1992.
DOI : 10.1109/2.161280

G. Bochmann, Specification languages for communication protocols, Proc. CHDL'93, 1993.
DOI : 10.1016/B978-0-444-81641-2.50035-6

J. Rowson, HardwareSoftware Co-Simulation, Proceedings of the 31st Design Automation Conference, pp.439-440, 1994.

D. E. Coumeri and . Thomas, A simulation environment for hardware-software codesign, Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors, 1995.
DOI : 10.1109/ICCD.1995.528791

C. Liem, C. Valderrama, F. Naçabal, P. Paulin, and A. Jerraya, System-on-a-chip cosimulation and compilation, IEEE Design & Test of Computers, vol.14, issue.2, pp.16-25, 1997.
DOI : 10.1109/54.587736

URL : https://hal.archives-ouvertes.fr/hal-00008011

S. Microelectronics, Sti1100 VideoPhone Codec: Preliminary Data Specification, 1993.

M. Harrand, A single chip videophone video encoder/decoder, Proceedings ISSCC '95, International Solid-State Circuits Conference, pp.231-274, 1987.
DOI : 10.1109/ISSCC.1995.535561

S. Wytrebwicz and . Budkowski, Communication Protocols Implemented in Hardware: VHDL generation from Estelle Current Issue in Electronic Modelling, pp.77-98, 1995.

P. Lemarec, C. Valderrama, F. Hessel, and A. Jerraya, Hardware, Software and Mechanical Cosimulation for Automotive Applications, p.98, 1998.

R. K. Gupta and G. D. Micheli, A co-synthesis approach to embedded system design automation " , Design Automation for Embedded Systems, An International Journal, vol.1, issue.12, pp.121-145, 1996.

B. Dasarathy, Timing Constraints of Real-Time Systems: Constructs for Expressing Them, Methods of Validating Them, IEEE Transactions on Software Engineering, vol.11, issue.1, pp.80-86, 1985.
DOI : 10.1109/TSE.1985.231845

Y. Shin and K. Choi, Thread-based software synthesis for embedded system design, Proceedings, The European Design & Test Conference (ED&TC), pp.282-286, 1996.

J. Madsen and J. P. Brage, Modeling Shared Variables in VHDL, Proceedings ACM'94, pp.486-491, 1994.

F. Vahid, S. Narayan, and D. Gajski, A Transformation for Integrating VHDL Behavioral Specification with Synthesis and Software Generation, Proceedings of ACM'94, pp.552-557, 1994.

P. Eles, K. Kuchcinski, Z. Peng, and M. Minea, Synthesis of VHDL Concurrent Processes, Proceedings of ACM'94, pp.540-545, 1994.

S. C. Cheng, J. A. Stankovic, and K. Ramamritham, Scheduling algorithms for hard real-time systems, IEEE Tutorial on Hard real-time Systems, pp.150-173, 1985.

G. Sih and E. A. Lee, A compile-time scheduling heuristic for interconnection-constrained heterogeneous processor architectures, IEEE Transactions on Parallel and Distributed Systems, vol.4, issue.2, pp.175-187, 1993.
DOI : 10.1109/71.207593

J. L. Pino and E. A. Lee, Hierarchical static scheduling of data-flow graphs onto multiple processors, Proc. IEEE International Conference on Acoustics, Speech, and Signal Processing, 1994.

P. Hoang and J. Rabaey, Scheduling of DSP programs onto multiprocessors for maximum throughput, IEEE Transactions on Signal Processing, vol.41, issue.6, pp.2225-2235, 1993.
DOI : 10.1109/78.218149

C. Liu and J. W. Lanyland, Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment, Journal of the ACM, vol.20, issue.1, pp.46-61, 1973.
DOI : 10.1145/321738.321743

D. Peng and K. G. Shin, Static allocation of periodic tasks with precedence constraints in distributed real-time systems, [1989] Proceedings. The 9th International Conference on Distributed Computing Systems, 1989.
DOI : 10.1109/ICDCS.1989.37947

P. Chou and G. Borriello, Interval scheduling, Proceedings of the 32nd ACM/IEEE conference on Design automation conference , DAC '95, pp.462-467, 1995.
DOI : 10.1145/217474.217571

S. Vercauteren, B. Lin, and H. De-man, A strategy for real-time kernel support in application-specific Hw/ Sw embedded architectures, 33rd Design Automation conference, 1996.

R. Ernst, J. Henkel, and T. Benner, Hardware-software cosynthesis for micro-controllers, IEEE Design & Test of Computers, pp.64-75, 1993.

M. Edwards and J. Forrest, A development environment for the cosynthesis of embedded software/hardware systems, Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC, 1994.
DOI : 10.1109/EDTC.1994.326834

B. G. Hald and J. Madsen, A flexible architecture representation for high-level synthesis, Proceedings APCHDL, pp.247-250, 1994.

J. Madsen, Interface modeling and synthesis, 1995.

S. Narayan and D. Gajski, Protocol generation for communication channels, Proceedings of the 31st annual conference on Design automation conference , DAC '94, pp.547-548, 1994.
DOI : 10.1145/196244.196530

S. Narayan and D. Gajski, Interfacing incompatible protocols using interface process generation, Proceedings of the 32nd ACM/IEEE conference on Design automation conference , DAC '95, pp.468-473, 1995.
DOI : 10.1145/217474.217572

K. Olukotun, R. Helaihel, J. Levitt, and R. Ramirez, A software-hardware cosynthesis approach to digital system simulation, IEEE Micro, vol.14, issue.4, pp.48-58, 1994.
DOI : 10.1109/40.296157

T. Adam, M. Chandy, and J. Dickson, A comparison of list schedules for parallel processing systems, Communications of the ACM, vol.17, issue.12, pp.685-690, 1974.
DOI : 10.1145/361604.361619

M. Chiodo, P. Giusto, A. Jurecska, H. Hsieh, A. Sangiovanni-vicentelli et al., Hardware-Software Codesign of Embeeded Systems, IEEE Micro, pp.26-36, 1994.

P. Chou, E. Walkup, and G. Boriello, Scheduling for reactive Real-Time Systems, IEEE Micro, pp.37-47, 1994.

V. Mooney, T. Sakamoto, and G. D. Micheli, Run-time scheduler synthesis for hardware-software systems and application to robot control design, Proceedings of 5th International Workshop on Hardware/Software Co Design. Codes/CASHE '97, 1997.
DOI : 10.1109/HSC.1997.584586

D. Thomas and P. Moorby, The Verilog Hardware Description Language, Boston, pp.146-167, 1991.

P. Zave and M. Jackson, Conjunciton as Composition, ACM trans. On Software engineering and methodology, vol.8, issue.2, pp.379-411, 1993.

M. Dolle and M. Schlett, A cost-effective RISC/DSP microprocessor for embedded systems, IEEE Micro, vol.15, issue.5, pp.32-40, 1995.
DOI : 10.1109/40.464581

M. Flynn and V. Milutinovic-editor, High-Level Language Computer Architecture, 1989.

B. Cole, Processor Architectures, EE-times, 1995.

I. Bolsens, Hardware/sotware co-design of digital telecomunication systems, Proceedings of the IEEE, pp.391-418, 1997.

C. Liem, Retargetable Compilers for Embedded Core Processors: Methods and Experiences in Industrial Applications, 1997.
DOI : 10.1007/978-1-4757-6422-2

A. Jerraya, M. Romdhani, C. Valderrama, and P. , Lemarrec et aliasLanguages for System Level Specification and DesignHardware-Software Codesign: Principles and Practice, Book chapter, pp.209-236, 1997.

R. Ernst, Target Architectures Hardware /Software Co-Design: Principles and Practice, pp.113-148, 1997.

G. Fisher, Rapid system prototyping in an open system environment, Proceedings of IEEE 5th International Workshop on Rapid System Prototyping, 1994.
DOI : 10.1109/IWRSP.1994.315891

J. Calvez, D. Heller, and O. Pasquier, System Performance Modeling and Analysis with VHDL : Benefits and Limitations, Proceedings of VHDL-Forum for CAD in Europe Conference, 1995.

P. Runstadler and R. Crevier, Virtual Prototyping for System Design and Verification, Synopsys Documentation, 1995.

A. Group, Signal Processing WorkSystem : DSP Processor Models User's Guide, Cadence Design Systems, 1996.

. Cadence, Overview of the Leapfrog C interface, Cadence Design Systems, 1994.

C. Iseli and E. Sanchez, Spyder: A SURE (SUperscalar and REconfigurable) processor, The Journal of Supercomputing, vol.22, issue.7, pp.231-252, 1995.
DOI : 10.1007/BF01212870

J. Calvez, A System Specification Model and Method CIEM Current Issues In Electronic Modeling High-level System Modeling: Specification and Design Methodologies, 1996.

J. Calvez, D. Heller, and O. Pasquier, Uninterpreted Cosimulation for Performance evaluation of Hw/Sw Systems, proc. 4th International Workshop on Hardware/Software Codesign CODES/CASHE'96, pp.132-139, 1996.

N. Voros, S. Tsasakou, C. Valderrama, S. Arab, A. Birbas et al., Hardware -Software Co-design of embedded systems using multiple formalisms for application development, IFIP International Conference FORTE/PSTV'98, Formal Description Techniques & Protocol Specification, Testing, and Verification, 1998.
URL : https://hal.archives-ouvertes.fr/hal-01396490

. N. Workshop, S. Voros, C. Tsasakou, S. Valderrama, A. Arab et al., ATM protocol design: A challenge for modern HW-SW codesign methodologies, 10th GI, 1998.

S. Tsasakou, N. Voros, C. Valderrama, S. Arab, V. Mariatos et al., A Hardware- Software co-design methodology for embedded telecommunication systems, EMMSEC'98, European Multimedia, Microprocessor Systems, and Electronic Commerce Conference and Exposition, 1998.
URL : https://hal.archives-ouvertes.fr/hal-01398534

. N. Journal, S. Voros, C. Tsasakou, S. Valderrama, A. Arab et al., Hardware-Software co-design in practice: An approach using Multiple specification formalisms for industrial telecommunication applications, IEEE Micro Magazine, 1998.

P. , L. Marrec, C. Valderrama, F. Hessel, and A. Jerraya, Hardware, Software and Mechanical Cosimulation for Automotive Applications, IEEE International Workshop on Rapid Systems Prototyping RSP'98, 1998.

M. Abid, T. Ismail, A. Changuel, C. Valderrama, M. Romdhani et al., Hardware/Software Codesign Methodology for Design of Embedded Systems, Journal, Integrated Computer Aided Engineering, vol.5, issue.1, p.6983, 1998.

M. Abid, A. Changuel, C. Valderrama, and A. Jerraya, Conception de systèmes mixtes logiciels-matériels à partir de modèles C/VHDL, Journal, TSI, Technique et Science Informatiques, vol.17, issue.2, 1998.

C. Liem, F. Nacabal, C. Valderrama, P. Paulin, and A. Jerraya, Cosimulation and Software Compilation Methodologies for the System-on-a-Chip in Multimedia, Journal, IEEE Design & Test of Computers, special issue on "Design, Test & ECAD in Europe, vol.14, issue.2, pp.16-25

C. Valderrama, C. Liabeuf, F. Naçabal, P. Paulin, and A. Jerraya, Hardware/Software Cosimulation, 7tn workshop on Synthesis and System Integration of Mixed technologies -SASIMI'97, pp.110-119, 1997.
URL : https://hal.archives-ouvertes.fr/hal-00008108

C. Valderrama, P. L. Marrec, and A. Jerraya, Multilanguage Cosimulation, IEEE Second International High level Design Validation and Test Workshop -HLDVT'97, 1997.
URL : https://hal.archives-ouvertes.fr/hal-00016267

A. Jerraya, M. Romdhani, C. Valderrama, and P. , Lemarrec et aliasLanguages for System Level Specification and DesignHardware-Software Codesign: Principles and Practice, Book chapter, pp.209-236, 1997.

C. Valderrama, M. Romdhani, and A. , Jerraya et aliasCosmos: A Transformational Co-Design Tool for Multiprocessor Architectures Hardware-Software Codesign: Principles and Practice, Book chapter, pp.235-261, 1997.

C. A. Valderrama, F. Naçabal, P. Paulin, and A. A. Jerraya, Automatic VHDL-C Interface Generation for Distributed Cosimulation: Application to Large Design Examples, Journal, To appear Journal Design Automation For Embedded Systems -Special Issue on Rapid Prototyping, 1997.
URL : https://hal.archives-ouvertes.fr/hal-00008169

M. Abid, T. Ismail, A. Changuel, C. Valderrama, and A. Jerraya, Design of Embedded Hardware/software Systems Using COSMOS Methodology, Journal, 1997.

C. Valderrama, Prototypage Virtuel pour la Génération d'Architectures Flexibles et Modulaires, Colloque CAO de circuits integres et systemes, pp.15-17, 1997.

J. Daveau, C. Valderrama, and A. Jerraya, VHDL generation from SDL specification, Conference, XIII IFIP Conference on Computer Hardware Description Languages (CHDL97), 1997.
URL : https://hal.archives-ouvertes.fr/hal-00016246

P. Paulin, M. Cornero, C. Liem, F. Nacabal, C. Donawa et al., Trends In Embedded Systems Technology, Book chapter NATO ASI Series, vol.310, pp.311-338, 1996.
DOI : 10.1007/978-94-009-0187-2_13

URL : https://hal.archives-ouvertes.fr/hal-01466207

J. Daveau, C. Valderrama, and A. , Jerraya et aliasCosmos: an SDL Based Hardware/Software Codesign Environment Current Issues In Electronic Modelling -CIEM -Special issue on Co-Design & Co- Verification, Journal, vol.8, 1996.

C. Valderrama, F. Naçabal, P. Paulin, and A. Jerraya, Automatic generation of interfaces for distributed cvhdl cosimulation of embedded systems: an industrial ex perience, 7th IEEE International Workshop on Rapid Systems Prototyping, pp.72-77, 1996.

C. Valderrama, A. Changuel, and A. Jerraya, Virtual prototyping for modular and flexible hardware/software systems, Design Automation for Embedded Systems, vol.2, issue.3/4, pp.267-283, 1997.
DOI : 10.1023/A:1008829719142

URL : https://hal.archives-ouvertes.fr/hal-00008115

C. Valderrama, A. Changuel, P. V. Raghavan, M. Abid, T. B. Ismail et al., A unified model for cosimulation and co-synthesis of mixed hardware/software systems", Conference, The European Design and Test Conference ED&TC'95 The best paper awards ED&TC, pp.6-995, 1995.

C. Valderrama, A. Changuel, P. V. Raghavan, M. Abid, T. B. Ismail et al., An unified environment for co-simulation of hetherogeneous hadware/software systems, Conference, VHDL-Forum for CAD in Europe (VFE) EURO-MICRO VHDL, 1994.

S. Fichier, cosimuler le prototype virtuel Le fichier shell généré par S2CV permet de créer l'environnement de cosimulation C-VHDL de l'exemple. Ce fichier sert à valider l'exemple par la cosimulation. Le shell exécute la compilation de tous les fichiers (C, VHDL et VCI) générés par S2CV et initialise l

#. Inpg-'echo-'*-*-*, SOLAR Report problems to: valderr@verdon.imag.fr' make -f controleur_10.mak make -f controleur_10.mak # MANUAL TANSFORMATION cp moteur1.ini moteur1.dat cp moteur2.ini moteur2.dat xterm -e gnuplot moteur.plot & # END MANUAL TANSFORMATION xterm -bg RoyalBlue -fg White -T "C-program [algo2_I]" -name "algo2_I" -e 'algo2_I' & xterm -bg RoyalBlue -fg White -T "C-program [software_I]" -name "software_I" -e 'software_I' & xterm -bg RoyalBlue -fg White -T "C-program [algo1_I]" -name "algo1_I" -e 'algo1_I' & vhdldbx TB_moteur_Structure ; kpc vhdlsim; kpc algo2_I ; kpc software_I ; kpc algo1_I ; kpc gnuplot; kpc msgsvr ; ipcc