A. Avizienis, Signed Digit Number Representations for Fast Parallel Arithmetic, IRE Transactions on Electronic Computers, issue.10, p.389400, 1961.

. Batut, Aspects Algorithmiques du Systtme de Calcul Arithmmtique en Multiprrcision PARI, Thhse, 1989.

D. Baude and . Skillicorn, Vers de la Programmation Paralllle Structurre fondde sur la Thhorie des Cattgories, Technique et Science Informatiques, vol.134, p.525538, 1994.

O. Benouamer, P. Jaillon, D. Michelucci, and J. M. Moreau, A Lazy Arithmetic Library, Proceedings of the 11th Symposium on Computer Arithmetic, p.242249, 1993.

R. Bhandarkar and . Brunner, V AX Vector Architecture, Proceedings of the 17th Symposium on Computer Architecture, p.204215, 1990.

W. Bohlender, P. Walter, and D. W. Matula, Semantics for exact floating point operations, [1991] Proceedings 10th IEEE Symposium on Computer Arithmetic, p.2227, 1991.
DOI : 10.1109/ARITH.1991.145529

T. Brent and H. Kung, ARegular Layout for Parallel Adders, IEEE Transactions on Computers, 1982.

. Buchholz, The IBM Systemm370 Vector Architecture, IBM System Journal, vol.251, p.5162, 1986.

W. Char, K. O. Geddes, and G. H. Gonnet, Maple V : Language Reference Manual, 1991.
DOI : 10.1007/978-1-4615-7386-9

W. Char, K. O. Geddes, and G. H. Gonnet, Maple V : Library Reference Manual, 1991.
DOI : 10.1007/978-1-4757-2133-1

V. Chatelin and . Fraysss, Analysis of arithmetic algorithms: a statistical study, [1991] Proceedings 10th IEEE Symposium on Computer Arithmetic, p.1016, 1991.
DOI : 10.1109/ARITH.1991.145527

. Cheng, Vector Pipelining, Chaining, and Speed on the IBM 3090 and Cray X-MP. IEEEEComputer, p.3146, 1989.

M. Chesnaux, Etude Thhorique et Impllmentation en ADA de la MMthode CESTAC. Thhse, 1988.

. Christaller, Vers un support d'exxcution portable pour applications paralllles irrrguliires : Athapascan-0. Thhse, 1996.

V. Coissard and A. Guyot, U nCoprocesseur pour l'Arithmmtique exacte, Proceedings of the 4th Symposium sur les architectures nouvelles de machines, p.173182, 1996.

A. Coissard and . Guyot, OCAPI : A Coprocessor for Innnite Precision Arithmetic, Proceedings of SCAN'97, pages VIII.5VIII.9, 1997.

. Daumas, Contribution l'Arithmmtique des Ordinateurs : Vers une Maatrise de la Prrcision, 1996.

A. Diep, C. Nelson, and J. P. Shen, Performance Evaluation of the PowerPC 620 Microarchitecture, Proceedings of the 22th Symposium on Computer Architecture, p.163174, 1995.

M. Edenneld, W. Gallup, and . Ledbetter, The 68040 Processor, Part 1, Design and Implementation, IEEE Micro, vol.101, p.6678, 1990.

H. Edmondson, P. Rubinfeld, and R. Preston, Superscalar instruction execution in the 21164 Alpha microprocessor, IEEE Micro, vol.15, issue.2, p.3343, 1995.
DOI : 10.1109/40.372349

E. Ely, The VPI Software Package for Variable-Precision Interval Arithmetic, Interval Computations, vol.2, p.135153, 1993.

D. Ercegovac and T. Lang, On-the-Fly Conversion of Redundant into Conventional Representations, IEEE Transactions on Computers, vol.36, issue.7, p.895897, 1987.
DOI : 10.1109/TC.1987.1676986

P. Feldstein and . Turner, O v errow, Underrow and Severe Loss of Signiicance in Floating Point A ddition and Subtraction, IMA Journal of Numerical Analysis, vol.6, p.241251, 1986.

A. Fisher, Very Long Instruction Word Architectures and the ELI-512, Proceedings of the 10th Symposium on Computer Architecture, p.140150, 1983.

J. L. Gautier and . Roch, P AC++ System and Parallel Algebraic Numbers Computation, Proceedings of the 1st International Symposium on Parallel Symbolic Computation PASCO'94, p.145153, 1994.

D. Gee, M. D. Hill, D. N. Pnevmatikatos, and A. J. Smith, Cache performance of the SPEC92 benchmark suite, IEEE Micro, vol.13, issue.4, p.1727, 1993.
DOI : 10.1109/40.229711

. Ginzburg, Athapascan-0b : Integration eecace et portable de multiprogrammation llggre et de communications, Thhse, Institut National Polytechnique de Grenoble, 1997.

M. Guyot, G. Belrhiti, and . Bosco, Adders synthesis, Proceedings of IFIP Workshop on Logic and Architecture Synthesis, p.280286, 1994.
DOI : 10.1007/978-0-387-34920-6_28

URL : https://hal.archives-ouvertes.fr/hal-01398573

D. A. Han and . Carlson, Fast Area-EEcient VLSI Adders, Proceedings of the 8th Symposium on Computer Arithmetic, p.4956, 1987.
DOI : 10.1109/arith.1987.6158699

L. Hennessy and D. A. Patterson, Architecture des ordinateurs, 1996.

W. Horst, R. L. Harris, and R. L. Jardine, Multiple Instruction Issue in the NonStop Cyclone Processor, Proceedings of the 17th Symposium on Computer Architecture, p.216226, 1990.

. Hwang, Advanced Computer Architecture : Parallelism, Scalability, Programmability, 1993.

. Jaillon, Proposition d'une Arithmmtique Rationnelle Paresseuse et d'un Outil d'Aide la Saisie d'Objets en Synthhse d'Images, Thhse, Ecole des Mines de Saint-Etienne, 1993.

. Jebelean, A nAlgorithm for Exact Division, Journal of Symbolic Computation, vol.152, p.169180, 1993.

D. Jenks and R. S. Sutor, Axiom : The Scientiic Computation System, 1992.

. Karasick, On the Representation and Manipulation of Rigid Solids, Thhse, 1989.

C. Kernhof, B. Baumhof, and . Hhhinger, A CMOS Floating-Point Processing Chip for Veriied Exact Vector Arithmetic, Proceedings of ESSCIRC'94, p.14, 1994.

U. Klatte, C. Kulisch, and . Lawo, A C++ Class Library for Extended Scientiic Computing, 1993.

. Knnfel, Fast hardware units for the computation of accurate dot products, [1991] Proceedings 10th IEEE Symposium on Computer Arithmetic, p.7074, 1991.
DOI : 10.1109/ARITH.1991.145536

M. Kogge, The Architecture of Pipelined Computers, 1981.

M. K. Ogge and H. S. Stone, A Parallel Algorithm for the EEcient Solution of a General Class of Recurrence Equations, IEEE Transactions on Computers, issue.228, p.786792, 1973.

K. Ornerup and D. W. Matula, An On-line Arithmetic Unit for Bit-Pipelined Rational Arithmetic, Journal of Parallel and Distributed Computing, vol.53, pp.310-330, 1988.

W. Kulisch and . Miranker, Computer Arithmetic in Theory and in Practice, 1981.

N. Lenell and . Bagherzadeh, APerformance Comparaison of Several Superscalar Processor Models with a VLIW Processor, Proceedings of the 7th International Parallel Processing Symposium, p.4448, 1993.

W. Matula and P. Kornerup, Finite Precision Rational Arithmetic : Slash Number Systems, IEEE transactions on Computers, p.318, 1985.

D. Michelucci, Lazy arithmetic, IEEE Transactions on Computers, vol.46, issue.9, p.961975, 1997.
DOI : 10.1109/12.620478

M. Mirapuri, N. Woodacre, and . Vasseghi, The Mips R4000 processor, IEEE Micro, vol.12, issue.2, p.1022, 1992.
DOI : 10.1109/40.127580

C. Mmller, W. Rrb, and . Rrlling, Exact accumulation of floating-point numbers, [1991] Proceedings 10th IEEE Symposium on Computer Arithmetic, p.6469, 1991.
DOI : 10.1109/ARITH.1991.145535

A. Moore, R. Padegs, W. Smith, and . Buchholz, Concepts of the Systemm370 Vector Architecture, Proceedings of the 14th Symposium on Computer Architecture, p.282288, 1963.

A. Moussa, A. Skaf, and . Guyot, Design of a GaAs Redundant Divider, Proceedings of VLSI'93, p.6372, 1993.
URL : https://hal.archives-ouvertes.fr/hal-00014956

M. Muller, Arithmmtique des Ordinateurs, 1989.

H. Nakajima, Y. Nakano, and . Nakakura, OHMEGA : A VLSI Superscalar Processor Architecture for Numerical Applications, Proceedings of the 18th Symposium on Computer Architecture, p.160168, 1991.

M. Nielsen and P. K. Ornerup, MSB-First Digit Serial Arithmetic, Proceedings of Real Numbers and Computers, p.2343, 1995.
DOI : 10.1007/978-3-642-80350-5_44

G. Ottman, C. Thiemt, and . Ullrich, Numerical stability of geometric algorithms, Proceedings of the third annual symposium on Computational geometry , SCG '87, p.119125, 1987.
DOI : 10.1145/41958.41970

. Ozello, Calcul Exact des Formes de Jordan et Frobenius d'une Matrice, Thhse, Institut National, 1987.
URL : https://hal.archives-ouvertes.fr/tel-00323705

A. Patterson and J. L. Hennessy, Computer Organization and Design :The HardwareeSoftware Interface, 1994.

. Pichat, Contribution l'Etude des Erreurs d'Arrondi en Arithmmtique Virgule Flottante, Thhse, 1976.

L. Porte and J. Vignes, Etude statistique des erreurs dans l'arithmmtique des ordinateurs ; Application au contrrle des rrsultats d'algorithmes nummriques, Numerische Mathematik, vol.231, p.6372, 1974.

M. Priest, Algorithms for arbitrary precision floating point arithmetic, [1991] Proceedings 10th IEEE Symposium on Computer Arithmetic, p.132143, 1991.
DOI : 10.1109/ARITH.1991.145549

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=

. Ratz, The EEects of the Arithmetic of Vector Computers on Basic Numerical Algorithms, Proceedings of SCAN'89, 1989.

L. Roch, Architecture du Systtme PAC et son Arithmmtique Rationnelle, Thhse, Institut National Polytechnique de Grenoble, 1989.

M. Sato, T. Nakajima, G. Sukemura, and . Goto, A Regularly Structured 54- bit Modiied-Wallace-Tree Multiplier, Proceedings of VLSI'91, p.19, 1991.

E. E. Schulte and . Schwartzlander, Exact rounding of certain elementary functions, Proceedings of IEEE 11th Symposium on Computer Arithmetic, 1993.
DOI : 10.1109/ARITH.1993.378099

E. E. Schulte and . Schwartzlander, Hardware design and arithmetic algorithms for a variable-precision, interval arithmetic coprocessor, Proceedings of the 12th Symposium on Computer Arithmetic, p.222229, 1995.
DOI : 10.1109/ARITH.1995.465354

. Sklansky, Conditionnal-Sum Addition Logic, IRE transactions on Electronic Computers, issue.9, p.226231, 1960.

V. So and . Zecca, Cache Performance of Vector Processors, Proceedings of the 15th Symposium on Computer Architecture, p.261268, 1988.

S. Sohi, Instruction issue logic for high-performance, interruptible, multiple functional unit, pipelined computers, IEEE Transactions on Computers, vol.39, issue.3, p.349359, 1990.
DOI : 10.1109/12.48865

S. Trivedi and M. D. Ercegovac, On-Line Algorithms for Division and Multiplication, IEEE Transactions on Computers, issue.267, p.681687, 1977.

S. S. Troiani, N. N. Ching, and . Quaynor, The VAX 8600 I Box, a Pipelined Implementation of the VAX Architecture, Digital Technical Journal, vol.1, p.419, 1985.

G. Valiant, ABridging Model for Parallel Computation, Communications of the ACM, vol.338, p.103111, 1990.

. Vignes, Contrrle et Estimation Stochastique des Arrondis de Calcul, AF- CET Interfaces, p.311, 1987.

. Weber, The accelerated integer GCD algorithm, ACM Transactions on Mathematical Software, vol.21, issue.1, p.111122, 1995.
DOI : 10.1145/200979.201042

H. Weste and K. Eshraghian, Principles of CMOS VLSI Design, 1993.