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Etude et conception de microsystèmes micro-usinés par la face avant en utilisant des technologies standards des circuits intégrés sur arséniure de gallium

Abstract : The increasing interest on microelectromechanical systems (MEMS) nowadays is due to the same reasons that guaranteed the digital integrated circuit (IC) success in the last decade, such as miniaturization, design flexibility, volume manufacturability, reliability and reproducibility. Besides the low cost and mature silicon technologies, alternative materials have also been targeted to applications where silicon lacks. Particularly, gallium arsenide (GaAs) seems to be very promising since piezoelectric, piezoresistive and optical effects can be exploited, as well as high-temperature and high-speed electronic circuit operation are available. n this thesis, a front-side bulk micromachining approach compatible to standard GaAs microelectronics technologies is investigated for collective fabrication of low cost, high volume microsystems applications. Free-standing structures are easily released through a maskless post-process wet chemical etching, with no modification in the IC fabrication, no damage in the pad metallization and passivation layers, and no influence on the unconcerned electronic parts. Initially, several etching solutions have been studied and characterized for micromachining purpose in terms of the preferential or anisotropic etching, the selectivity of GaAs to AlGaAs layers, the possible damages on the substrate surface layers, and the different etch rates for specific crystallographic directions. Next, potential micromachined devices compatible to such approach are evaluated for sensor, actuators, and microwave applications. Special attention is given to GaAs thermocouple-based devices, e.g., microwave power sensor, and suspended planar spiral inductors and transformers, which present numerous advantages to standard structures because of the significant reduction in parasitic capacitance effects and associated losses. Finally, a set of CAD tools related to the layout level design, such as cross-section and three-dimensional layout viewers, layout generators, bulk etching simulator for vertical profile, and open area converter have been developed on the Mentor Graphics environment.
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Submitted on : Wednesday, June 11, 2003 - 5:41:11 PM
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  • HAL Id : tel-00002987, version 1




R. Perez Ribas. Etude et conception de microsystèmes micro-usinés par la face avant en utilisant des technologies standards des circuits intégrés sur arséniure de gallium. Micro et nanotechnologies/Microélectronique. Institut National Polytechnique de Grenoble - INPG, 1998. Français. ⟨tel-00002987⟩



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