E. Outil, outil ESTIM réalise le calcul de performance et de la taille de la réalisation, ? Dernière

. @bullet-fichier-d, entrée : Solar (.solar), bibliothèque de processeurs (sw.lib), bibliothèque de caractérisation des réalisations (hw.lib) et bibliothèque de mémoires (memory.lib)

S. Outil, Solar to C/Vhdl) réalise la génération des modèles C et VHDL de la réalisation. ? Dernière version: 3.03 ? Fichier d'entrée : Solar (.solar)

O. Putf and L. Putf, Put Trace Flags) réalise l'addition des indicateurs de trace à la spécification initiale, décrite en SDL. ? Dernière version: 1.0 ? Fichier d'entrée : SDL (.pr) ? Fichier de sortie : SDL (.pr) ? Activation

O. Getv and L. Getv, Get Trace Values) récupère les valeurs de trace générées par la simulation fonctionnelle pendant le prototypage, et réalise l'annotation de la spécification SDL. ? Dernière version: 1.0 ? Fichier d'entrée : SDL (.pr) ? Fichier de sortie : SDL (.pr) ? Activation

@. Fichier-de-sortie, fichier de simulation (.sym) ? Activation : gsmcomp <fichier SDL> 3. Outil geodesim L'outil GEODESIM (Verilog) est le simulateur fonctionnel du langage SDL. Cet outil permet la validation de la spécification en utilisant des techniques formelles de vérification

@. Fichier-de-sortie, graphe de flot de message (.msc) ? Activation : geodesim <fichier de simulation> 4. Outil gcc L'outil GCC (Gnu) est le compilateur du langage C, utilisé pendant les étapes de co-simulation et de prototypage

. La-fenêtre-d, estimation du matériel affiche: le nom de l'unité ou de la procédure sélectionnée, la réalisation choisie, la fréquence de l'horloge, le temps d'exécution, la taille du circuit, la complexité de la partie contrôle et de la partie chemin de données. Les champs liés aux restrictions (contraints)

G. F. Marchioro, J. M. Daveau, and A. A. Jerraya, Transformational partitioning for co-design of multiprocessor systems, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD) ICCAD-97, pp.508-515, 1997.
DOI : 10.1109/ICCAD.1997.643585
URL : https://hal.archives-ouvertes.fr/hal-00008111

G. F. Marchioro, J. M. Daveau, and A. A. , Jerraya Co-design of Multiprocessor Systems XXIV Software/Hardware Integration Seminars -Semish 97 Hardware/Software Co-design. XVI Computer Science up-to-date Journey -JAI'97. XVII Congress of Brazilien Computer Society, pp.13-24, 1997.

G. F. Marchioro and A. A. Jerraya, Conception Conjointe Logicielle/matérielle Basée en Transformations Interactives, Colloque CAO de circuits integres et systemes. 15-17 Janvier, 1997.

G. F. Marchioro, T. B. Ismail, and J. M. Daveau, Interactive Co-design Environment, 1995.

G. F. Marchioro and A. A. Suzim, System of Integrated Tools for IC Design, XI Conferência Latino Americana de Informatica ? CLEI, 1992.

G. F. Marchioro and A. A. Suzim, CAD tool integration for IC Design, IPESI - Eletro Eletrônica Revista Brasileira de Eletrônica -Ano XII -Nov, 1992.

G. F. Marchioro and A. A. Suzim, Hierarchical Symbolic Editor for Integrated Circuits, X Conferência Latino Americana de Informatica ? CLEI, 1990.

G. F. Marchioro and A. A. Suzim, Implementation of a Symbolic Editor for Integrated Circuits, 1989.

N. E. Zergainoh, G. F. Marchioro, and A. A. Jerraya, Hw/Sw codesign of an ATM network interface card starting from a system level specification, 1998 URSI International Symposium on Signals, Systems, and Electronics. Conference Proceedings (Cat. No.98EX167), 1998.
DOI : 10.1109/ISSSE.1998.738090
URL : https://hal.archives-ouvertes.fr/hal-00008103

M. Abid, T. B. Ismail, A. Changuel, C. A. Valderrama, M. Romdhani et al., Design of Embedded Systems using a Hardware/Software Co-Design Methodology, 1998.

J. M. Daveau, G. F. Marchioro, and A. A. Jerraya, Hardware/Software Co-design of an ATM Network Interface Card: a Case Study, p.98, 1998.
URL : https://hal.archives-ouvertes.fr/hal-00008159

J. M. Daveau, G. F. Marchioro, C. Valderrama, and A. A. Jerraya, VHDL generation from SDL specification, XIII IFIP Conference on Computer Hardware Description Languages (CHDL97), pp.182-201, 1997.
DOI : 10.1007/978-0-387-35064-6_18
URL : https://hal.archives-ouvertes.fr/hal-00016246

J. M. Daveau, G. F. Marchioro, and A. A. Jerraya, Partition et synthèse de la communication pour les systèmes mixtes logiciel/matériel. Codesign -Actes des Séminaires Action Scientifique. november 1996. n. 10, pp.23-31

J. M. Daveau, G. F. Marchioro, T. B. Ismail, and A. A. Jerraya, Cosmos: an SDL Based Hardware/Software Codesign Environment. Hardware /Software Codesign and Co-verification. CIEM -Current Issues In Electronic Modeling, pp.59-88, 1997.

J. M. Daveau, T. B. Ismail, G. F. Marchioro, and A. A. Jerraya, Protocol selection and interface generation for HW-SW codesign, Special issue on Design Automation of complex integrated systems, 1996.
DOI : 10.1109/92.555993
URL : https://hal.archives-ouvertes.fr/hal-00008118

T. B. Ismail, G. F. Marchioro, and A. A. Jerraya, Partitioning of VLSI Systems from a High Level Specification
URL : https://hal.archives-ouvertes.fr/hal-00008120

T. B. Ismail, G. F. Marchioro, and A. A. Jerraya, Découpage de Systèmes VLSI a partir d'une Spécification de haut niveau, Technique et Science Informatiques (TSI) Hermes, 1996.

A. A. Jerraya, M. Romdhani, C. A. Valderrama, P. L. Marrec, F. Hessel et al., Languages for System-Level Specification and Design. Hardware/Software Co-Design: Principles and Practice, Marchioro, Solar Reference Manual, pp.209-236, 1997.
URL : https://hal.archives-ouvertes.fr/hal-00016271

C. A. Valderrama, M. Romdhani, J. M. Daveau, G. F. Marchioro, A. Changuel et al., Cosmos: A Transformational Co-Design Tool for Multiprocessor Architectures Hardware/Software Co-Design: Principles and Practice, pp.281-330, 1997.

]. M. Bibliographie-référencée-[-abi96, A. Abid, A. A. Changuel, and . Jerraya, Exploration of Hardware/Software Design Space Through a Codesign of Robot Arm Controller, Proceedings of the European Design Automation Conference with EURO-VHDL 96, pp.42-47, 1996.

A. Allara, S. Filipponi, W. Fornaciari, F. Salice, and D. Sciuto, A Flexible Model for Evaluating the Behavior of Hardware, Software System, 5th International Workshop on Hardware/Software Co-Design Codes/Cache'97, 1997.

A. Alomary, T. Nakata, and Y. Honma, An ASIP instruction set optimization algorithm with functional module sharing constraint, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD), pp.526-532, 1991.
DOI : 10.1109/ICCAD.1993.580109

E. Barros, W. Rosentiel, and X. Xiong, A Method for Partitioning UNITY Language in Hardware and Software, Proceedings of the European Design Automation Conf. (Euro-DAC), 1994.

F. Belina, D. Hogrefe, and A. Sarma, SDL with Applications from Protocol Specification, 1991.

A. D. Birrell and B. J. Nelson, Implementing remote procedure calls, ACM Transactions on Computer Systems, vol.2, issue.1, pp.39-59, 1984.
DOI : 10.1145/2080.357392

G. V. Bochmann, Specification languages for communication protocols, Proceedings of the Conference on Hardware Description Languages CHDL'93, pp.365-382, 1993.
DOI : 10.1016/B978-0-444-81641-2.50035-6

B. Grady, Analyse & conception orientées objets, 1997.

K. Buchenrieder and C. Veith, A Prototyping Environment for Control Oriented Hardware/Software Systems Using StateCharts, ActivityCharts and FPGA, Proceedings of the European Design Automation Conference with Euro-VHDL, pp.60-65, 1994.

R. Camposano and R. M. Tablet, Design Representation for the Synthesis of behavioural VHDL models, XIII IFIP Conference on Computer Hardware Description Languages CHDL, 1989.

P. Camurati, F. Corno, P. Prinetto, C. Bayol, and B. Soulas, System-level modeling and verification: a comprehensive design methodology, Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC, 1994.
DOI : 10.1109/EDTC.1994.326811

M. Chiodo, Hardware-software codesign of embedded systems, IEEE MICRO, pp.26-36, 1994.

M. Chiodo, D. Engels, P. Giusto, H. Hsieh, A. Jurecska et al., A case Study in Computer Aided Codesign of Embedded Controllers, Design Automation for Embedded Systems, pp.51-67, 1996.

J. M. Daveau, T. B. Ismail, and A. A. Jerraya, Synthesis of system-level communication by an allocation-based approach, Proceedings of the Eighth International Symposium on System Synthesis, pp.150-155, 1995.
DOI : 10.1109/ISSS.1995.520627
URL : https://hal.archives-ouvertes.fr/hal-00008140

J. M. Daveau, Spécifications Systèmes et Synthèse de la Communication pour le Co-Design Logiciel, Thèse de Doctorat INPG, 1997.

H. Ding, Synthese Architecturale Interactive et Flexible, 1996.
URL : https://hal.archives-ouvertes.fr/tel-00010765

R. Ernst, J. Henkel, and T. Benner, Hardware-software co-synthesis for microcontrollers, IEEE Design & Test of Computers, vol.10, issue.0, 1993.

R. Ernst, J. Henkel, . Th, W. Benner, U. Ye et al., The COSYMA Environment for Hardware/Software Cosynthesis, Journal of Microprocessors and Microsystems, 1995.

O. Faergemand and A. Olsen, Introduction to SDL-92, Computer Networks and ISDN Systems, vol.26, issue.9, pp.1143-1167, 1994.
DOI : 10.1016/0169-7552(94)90016-7

B. Felice, Hardware-Software Co-Design of Embedded Systems ? The Polis Approach, 1997.

L. Freund, D. Dupont, and M. , Interface Optimization During Hardware- Software Partitioning, 5th International Workshop on Hardware/Software Co- Design Codes/Cache'97, pp.75-79, 1997.

D. Gajski, F. Vahid, and S. Narayan, A system-design methodology: executable-specification refinement, Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC, pp.458-463, 1994.
DOI : 10.1109/EDTC.1994.326836

D. Gajski, F. Vahid, S. Narayan, J. Gonggaj94c, ]. D. Gajski et al., Specification and Design of Embedded Systems Towards Achieving an 100-hour Design Cycle, European Design Automation Conference, 1994.

D. Gajski and F. Vahid, Specification and Design of Embedded Systems, IEEE Design & Test of Computers, pp.53-67, 1995.

D. Gajski, J. Gong, F. Vahid, and S. Narayan, The SpecSyn Design Process and Human Interface

J. D. Gee, M. D. Hill, D. N. Pnevmatikatos, and A. J. Smith, Cache performance of the SPEC92 benchmark suite, IEEE Micro, vol.13, issue.4, pp.17-27, 1993.
DOI : 10.1109/40.229711

J. Gong, D. Gajski, and S. Narayan, Software Estimation from Executable Specifications, Proceedings of the European Design & Automation Conference (EuroDAC), 1994.

J. Gong, D. Gajski, and S. Narayan, Software estimation from system-level specifications, Proceedings of the European Conference on Design Automation (EDAC), 1995.

J. Gong, D. Gajski, and S. Bakshi, Model refinement for hardware-software codesign, Proceedings of the European Design and Test Conference, pp.270-274, 1996.
DOI : 10.1145/250243.250247

R. K. Gupta and G. D. Micheli, Hardware-software cosynthesis for digital systems, IEEE Design & Test of Computers, vol.10, issue.3, pp.29-41, 1993.
DOI : 10.1109/54.232470

R. K. Gupta, C. N. Coelho, and G. D. Michelli, Program implementation schemes for hardware-software systems, Computer, vol.27, issue.1, pp.48-55, 1994.
DOI : 10.1109/2.248880

R. K. Gupta and G. D. Micheli, Partitioning of functional models of synchronous digital systems, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers, 1994.
DOI : 10.1109/ICCAD.1990.129884

N. Halbwachs, Synchronous programming of reactive systems, 1993.

W. Hardt and R. Camposano, Specification Analysis for HW/SW -Partitioning, 1995.

J. Henkel, T. Benner, R. Ernst, W. Ye, N. Serafimov et al., COSYMA: A Software Oriented Approach to Hardware/Software Codesign, The Journal of Computer and Software Engineering, vol.2, issue.3, pp.293-314, 1994.

J. Henkel, R. Ernst, U. Holtman, and T. Benner, Adaptation Of Partitioning And High-level Synthesis In Hardware/software Co-synthesis, IEEE/ACM International Conference on Computer-Aided Design, pp.96-100, 1994.
DOI : 10.1109/ICCAD.1994.629750

J. Henkel and R. Ernst, A Path-Based Technique for Estimating Hardware Runtime in Hw/Sw Cosynthesis, 8th Intl. Symposium on System Synthesis (SSS), pp.116-121, 1995.

J. L. Hennessy and D. A. Patterson, Architecture des ordinateurs: un approche quantitative, 1996.

D. Herrmann, J. Henkel, and R. Ernst, An approach to the adaptation of estimated cost parameters in the COSYMA system, Third International Workshop on Hardware/Software Codesign, pp.100-107, 1994.
DOI : 10.1109/HSC.1994.336718

J. Houand and W. Wolf, Process Partitioning for Distributed Embedded Systems, Proceedings of the 7th CODES/CASHE Workshop, pp.70-76, 1996.

T. B. Ismail, K. O-'brien, and A. A. Jerraya, Synthesis Steps and Design Models for CoDesign, IEEE Computer, special issue on rapid-prototyping of microelectronic systems, PARTIF: Interactive System-level Partitioning, VLSI Design, pp.333-345, 1995.

A. A. Jerraya and K. O-'brien, Solar: An Intermediate Format for System-Level Modeling and Synthesis, in "Computer Aided Software/Hardware Engineering, pp.147-175, 1994.

A. A. Jerraya, H. Ding, P. Kission, and M. Rahmouni, Behavioral Synthesis and Component Reuse with VHDL, 1997.
DOI : 10.1007/978-1-4615-6315-0

A. Kalavade, E. A. Lee, E. A. Kalavade, and . Lee, Local Phase Driven Algorithm for the Constrained Hardware/Software Partitioning Problem The extended Partitioning Problem: Hardware/Software Mapping, Scheduling, and Implementation-bin Selection, Proceedings of the Third International Workshop on Hardware/Software Codesign Proceedings of Sixth International Workshop on Rapid Systems Prototyping, pp.42-48, 1994.

P. Kission, Exploitation de la hierarchie et de la ré-utilisation de blocs existants par la synthèse de haut niveau, 1996.

C. W. Krueger and S. Reuse, Software reuse, ACM Computing Surveys, vol.24, issue.2, pp.131-183, 1992.
DOI : 10.1145/130844.130856

D. C. Ku and G. D. Micheli, HardwareC -A Language for Hardware Design, 1988.

O. Kyas, ]. E. Atm-networkslag91, D. E. Lagnese, and . Thomas, Architectural partitioning of system-level synthesis of integrated circuits, IEEE Trans. CAD/ICAS, vol.10, issue.7, pp.847-860, 1991.

J. Lanneer, W. Vanpraet, G. Geurts, and . Goossens, Chess : Retargetable Code Generation for Embedded DSP Processors, Code Generation for Embedded Processors, 1995.
DOI : 10.1007/978-1-4615-2323-9_5
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.42.2641

J. Madsen and B. Hald, An Approach to Interface Synthesis, Proceedings of the 8th International Symposium on System Synthesis, pp.16-21, 1995.

J. Madsen and J. Brage, Codesign analysis of a computer graphics application, Design Automation for Embedded Systems, vol.27, issue.1, 1996.
DOI : 10.1007/BF00134685

J. Madsen, J. Grode, P. V. Knudsen, M. E. Petersen, and A. Haxthausen, Lycos: the lyngby co-synthesis system. Design Automation for Embedded Systems, 1996.

P. Marwedel and G. Goessens, Code Generation for Embedded Processors (DSP), 1995.

G. and D. Micheli, Computer-aided hardware-software codesign, IEEE Micro, vol.14, issue.4, pp.10-16, 1994.
DOI : 10.1109/40.296153

V. J. Mooney, C. N. Coelho, T. Sakamoto, and G. Micheli, Synthesis from mixed specifications, Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition, pp.114-119, 1996.
DOI : 10.1109/EURDAC.1996.558192
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.17.9665

S. Narayan and D. Gajski, Interfacing incompatible protocols using interface process generation, Proceedings of the 32nd ACM/IEEE conference on Design automation conference , DAC '95, pp.468-473, 1995.
DOI : 10.1145/217474.217572

S. Narayan and D. Gajski, Rapid performance estimation for system design, Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition, pp.206-211, 1996.
DOI : 10.1109/EURDAC.1996.558206

P. Paulin, C. Liem, T. May, and S. Sutarwala, DSP Design Tool Requirements for Embedded Systems: A Telecommunication Industrial Perspective, in Journal of VLSI Signal Processing (special issue on synthesis for real-time DSP), 1994.

P. Paulin, J. Frehel, M. Harrand, E. Berrebi, C. Liem et al., High-level synthesis and codesign methods: An application to a Videophone Codec, Proceedings of EURO-DAC. European Design Automation Conference, pp.444-451, 1996.
DOI : 10.1109/EURDAC.1995.527442

S. Prakash and A. C. Parker, SOS: Synthesis of application-specific heterogeneous multiprocessor systems, Journal of Parallel and Distributed Computing, vol.16, issue.4, 1992.
DOI : 10.1016/0743-7315(92)90017-H

M. Romdhani, R. P. Hautbois, A. Jeffroy, P. Chazelles, and A. A. Jerraya, Evaluation and composition of specification languages, an industrial point of view, Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair, pp.519-523, 1995.
DOI : 10.1109/ASPDAC.1995.486364
URL : https://hal.archives-ouvertes.fr/hal-00008135

K. V. Rompaey, D. Verkest, I. Bolsens, and H. Deman, CoWare-a design environment for heterogeneous hardware/software systems, Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition, pp.252-257, 1996.
DOI : 10.1109/EURDAC.1996.558213

F. Rousseau, Etude du partitionnement logiciel/matériel dans la conception de systèmes électroniques: application aux systèmes de télécommunications orientés traitement de données, Thèse de Doctorat à l'université de Evry, 1997.

R. Saracco and P. A. Tilanus, CCITT SDL: Overview of the language and its applications, Computer Networks and ISDN Systems, vol.13, issue.2, pp.65-74, 1987.
DOI : 10.1016/0169-7552(87)90091-2

T. E. Smith and D. E. Setliff, Towards an automatic synthesis system for real-time software, [1991] Proceedings Twelfth Real-Time Systems Symposium, pp.34-42, 1991.
DOI : 10.1109/REAL.1991.160356

M. Srivastava and R. Brodersen, SIERA: A unified framework for rapidprototyping of system-level hardware and software, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, pp.676-693, 1995.

M. Theibinger, P. Stravers, and H. Veit, CASTLE: an interactive environment for hardware-software co-design, Proceedings of International Workshop on Hardware-Software Co-Design, pp.203-210, 1994.

F. Vahid and D. D. Gajski, Specification partitioning for system design, [1992] Proceedings 29th ACM/IEEE Design Automation Conference, 1992.
DOI : 10.1109/DAC.1992.227833

F. Vahid, J. Gong, and D. D. Gajski, A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning, Proceedings of the European Design Automation Conference, pp.214-219, 1994.

F. Vahid and D. D. Gajski, Closeness metrics for system-level functional partitioning, Proceedings of EURO-DAC. European Design Automation Conference, 1995.
DOI : 10.1109/EURDAC.1995.527425

W. Wolf, Object-oriented co-synthesis of distributed embedded systems, Proceedings of ASP-DAC'95/CHDL'95/VLSI'95 with EDA Technofair, 1995.
DOI : 10.1109/ASPDAC.1995.486369

A. Aho and J. Ullman, Concepts fondamentaux de l'informatique, 1993.

H. Akaboshi, T. Ishihara, and H. Yasuura, An Approximate Estimation of Power for Processor Architecture Design, Proc. 3rd Asian Pacific Conf. Hardware Description Languages(APCHDL'96), pp.23-27, 1996.

J. Axelsson, Analysis and Synthesis of Heterogeneous Real-Time Systems, 1997.

A. Balboni, W. Fornaciari, and D. Sciuto, Partitioning of Hw/Sw/ Embedded Systems: a Metrics-Based Approach, Integrated Computer-Aided Engineering, Barros, A. Sampaio, Towards Provably Correct Hardware/Software Partitionning Using Occam, Proceedings of the Third International Workshop on Hardware/Software Codesign, pp.210-217, 1994.

T. Benner, J. Henkel, and R. Ernst, Internal Representation of Embedded Hardware-/Software-Systems, Second IFIP International Workshop on Hardware/Software Codesign (Codes/CASHE'93). Innsbruck-Igls, Austria, 1993.

M. Belhadj, T. Gautier, P. Le-guernic, and P. Quinton, Towards a Multi-Formalism Framework for Architectural Synthesis : the ASAR Project, Proceedings of the Third International Workshop on Hardware/Software Codesign, pp.25-32, 1994.

A. Benveniste and G. Berry, The Synchronous Approach to Reactive and Realtime Systems, Proceedings of the IEEE, pp.1270-1282, 1991.
URL : https://hal.archives-ouvertes.fr/inria-00075115

A. Bender, MILP based task mapping for heterogeneous multiprocessor systems, Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition, pp.190-197, 1996.
DOI : 10.1109/EURDAC.1996.558204

F. Boussinot and R. D. Simone, The ESTEREL language, Proceedings of the IEEE, vol.79, issue.9, pp.1293-1304, 1991.
DOI : 10.1109/5.97299
URL : https://hal.archives-ouvertes.fr/inria-00075075

K. Buchenrieder and C. Veith, CODES: A Practical Concurent Design environment, Proceedings of the Internationnal Workshop on Hardware/Software Codesign, 1992.

K. Buchenrieder, A. Sedlmeier, C. Veith, S. Budkowski, and P. Dembinski, An Introduction ESTELLE : A Specification language for distributed systems, Sw Codesign with PRAM using CODES, Proceedings of the Conference on Hardware Description Languages, pp.2-23, 1987.

J. Buck, S. Ha, and E. Lee, Ptolemy: A Framework for Simulating and Prototyping Heterogeneous Systems, International Journal of Computer Simulation, 1994.
DOI : 10.1016/B978-155860702-6/50048-X

J. P. Calvez, Spécification et Conception des Systèmes: une méthodologie, 1992.

J. P. Calvez and D. Isidoro, A Codesign Experience with the MCSE Methology, Third International Workshop on Hardware/Software Codesign, pp.140-147, 1994.

R. Camposano and J. Wilberg, Embedded System Design, Design Automation for Embedded Systems, pp.5-50, 1996.

C. Carreras, J. C. Lopez, M. L. Lopez, M. Miranda, and O. Nieto, Estimation Methodology for Hardware-Software Codesign based on Intermediate Analytic Models, 21st Workshop on CAD Aids for VLSI in, Sesimbra (Portugal), 1994.

C. Carreras, J. C. Lopez, M. L. Lopez, C. Delgado-kloos, N. Martinez et al., A co-design methodology based on formal specification and high-level estimation, Proceedings of 4th International Workshop on Hardware/Software Co-Design. Codes/CASHE '96, pp.28-35, 1996.
DOI : 10.1109/HCS.1996.492223

A. Changuel, R. Rolland, and A. A. Jerraya, Design of an Adaptative Motors Controller based on Fuzzy Logic using Behavioral Synthesis, Proceedings of the European Design Automation Conference with EURO-VHDL 96, pp.48-52, 1996.

P. H. Chou, R. B. Ortega, and G. Borriello, The Chinook Hardware/Software Co- Synthesis System, Proceedings of the 8th International Symposium on System Synthesis, pp.22-27, 1995.

T. Cormem, C. Leiserson, and R. Rivest, Introduction à l'Algorithmique, Dunod, 1994.

J. W. Davidson, J. R. Rabung, and D. B. Whalley, Relating static and dynamic machine code measurements, IEE Transactions on Computers, 1992.
DOI : 10.1109/12.135557

D. Drusinsky and D. Harel, Using statecharts for hardware description and synthesis, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.8, issue.7, pp.798-807, 1989.
DOI : 10.1109/43.31537

N. D. Dutt, J. H. Cho, and T. Hadley, A User Interface for VHDL Behavioural Modelling, Proceedings of the Conference on Hardware Description Languages, pp.375-393, 1991.

P. Eles, Z. Peng, and A. Doboli, VHDL System Level Specification and Partitionning in a Hardware/Software Co-Synthesis environment, Proceedings of the Third International Workshop on Hardware/Software Codesign, pp.49-53, 1994.

D. Filo, D. Ku, C. N. Coelho, and G. De-micheli, Interface optimization for concurrent systems under timing constraints, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.1, issue.3, pp.268-281, 1993.
DOI : 10.1109/92.238441

T. Gautier and P. L. Guernic, SIGNAL: A declarative language for synchronous programming of real-time systems, 1987.
DOI : 10.1007/3-540-18317-5_15
URL : https://hal.archives-ouvertes.fr/inria-00075791

C. H. Gebotys, Optimal scheduling and allocation of embedded VLSI chips, [1992] Proceedings 29th ACM/IEEE Design Automation Conference, pp.116-120, 1992.
DOI : 10.1109/DAC.1992.227851

R. Goettke and E. Brehm, START -A Tool for Performance and Reliability Evaluation of Hardware / Software Designs, 1991.

P. Green, P. Rushton, and R. Beggs, An Example of Applying the Codesgn Method MOOSE, Third International Workshop on Hardware/Software Co-design, pp.65-72, 1994.

R. K. Gupta, C. N. Coelho, G. De-michelligup94c, ]. R. Gupta, and G. De-michelli, Synthesis and Simulation of Digital Systems Containing Interacting Hardware and Software Components, Proceedings of the IEEE Design Automation Conference Constrained Software Generation for Hardware-Software Systems, Proceedings of the Third International Workshop on Hardware/Software Codesign, pp.225-230, 1992.
DOI : 10.1016/B978-155860702-6/50049-1

R. K. Gupta and G. De-michelli, A Co-synthesis Approach to Embedded System Design Automation, Design Automation for Embedded Systems, pp.69-120, 1996.

R. K. Gupta and G. Demicheli, Specification and analysis of timing constraints for embedded systems, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.16, issue.3, 1997.
DOI : 10.1109/43.594830

P. , L. Guernic, T. Gautier, M. Le-borgne, and C. Lemaire, Programming Real- Time Applications with SIGNAL, Proceedings of the IEEE, pp.1321-1336, 1991.
URL : https://hal.archives-ouvertes.fr/inria-00075114

C. A. Hoare, Communicating sequential processes, Communications of the ACM, vol.21, issue.8, pp.666-677, 1978.
DOI : 10.1145/359576.359585

H. Hulgaard, S. M. Burns, T. Amon, and G. Borriello, An algorithm for exact bounds on the time separation of events in concurrent systems, IEEE Transactions on Computers, vol.44, issue.11, pp.1306-1317, 1995.
DOI : 10.1109/12.475126

Y. Hu, A. Ghouse, and B. S. Carlson, Lower Bounds on the Iteration Time and the Number of Resources for Functional Pipelined DataFlow Graphs, Proc. ICCD'93, pp.21-24, 1993.

T. B. Ismail, J. M. Daveau, K. O-'brien, and A. A. Jerraya, A system-level communication synthesis approach for hardware/software systems, Microprocessors and Microsystems, vol.20, issue.3, pp.149-157, 1996.
DOI : 10.1016/0141-9331(95)01072-6
URL : https://hal.archives-ouvertes.fr/hal-00008163

R. Jain, A. C. Parker, and N. Park, Predicting system-level area and delay for pipelined and nonpipelined designs, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.11, issue.8, pp.955-965, 1992.
DOI : 10.1109/43.149767

A. Jantsch, P. Ellervee, J. Oberg, A. Hemani, and H. Tenhunen, Hardware/Software Partitioning and Minimizing Memory Interface Traffic, Proceedings of the European Design Automation Conference with Euro-VHDL, pp.226-231, 1994.

S. Kahlert, J. U. Knabchen, and D. Monjau, Design and Analysis of Heterogeneous Systems Using Graphically Oriented Methods : A Case Study, Proceedings of SASIMI, pp.23-32, 1993.

A. Kalavade, E. A. Lee, and . Hardware, A hardware-software codesign methodology for DSP applications, IEEE Design & Test of Computers, vol.10, issue.3, pp.16-28, 1993.
DOI : 10.1109/54.232469

S. A. Khan and V. K. Madisetti, System partitioning of MCMs for low power, IEEE Design & Test of Computers, vol.12, issue.1, pp.41-52, 1995.
DOI : 10.1109/54.350690

P. Kission, H. Ding, and A. A. Jerraya, VHDL Based Design Methodology for Hierarchy and Component Reuse at the Behavioral Level, Proceedings of the European Design Automation Conference with Euro-VHDL, 1995.

M. J. Knieser and C. A. Papachristou, COMET: a hardware-software codesign methodology, Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition, pp.178-183, 1996.
DOI : 10.1109/EURDAC.1996.558202

G. Koch, U. Kebschull, and W. , A Prototyping Environment for Hardware/Software Codesign in the COBRA Project Exploring Hardware/Software Abstractions & Alternatives for Codesign, Proceedings of the Third International Workshop on Hardware/Software Codesign International Workshop on Hardware-Software Co-Design, pp.10-16, 1993.

S. Kumar, J. Aylor, B. W. Johnson, and W. A. Wulf, The Codesign of Embedded Systems, 1996.

P. A. Laplante, Real-Time Systems Design and Analysis -an engineer's handbook, 1992.
DOI : 10.1002/0471648299

L. Lavagno, M. Chiodo, and P. Giusto, Hardware-Software Co-design of Embedded Systems, IEEE Micro, vol.14, issue.4, pp.26-36, 1994.

L. Lavagno, A. Sangiovani-vincentelli, and H. Hsieh, Embedded System Codesign: Synthesis and Verification, pp.213-242, 1996.

B. Lin, S. Vercauteren, and H. De-man, Embedded architecture co-synthesis and system integration, Proceedings of 4th International Workshop on Hardware/Software Co-Design. Codes/CASHE '96, pp.2-9, 1996.
DOI : 10.1109/HCS.1996.492220
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.57.1258

Y. S. Li and S. Malik, Performance analysis of embedded software using implicit path enumeration, Proceedings Design Automation Conference, pp.456-461, 1995.

P. Longuet, Java: votre guide complet de développement, 1996.

P. Michel, U. Lauther, and P. Duzy, The Synthesis Approach to Digital System Design, 1992.
DOI : 10.1007/978-1-4615-3632-1

]. A. Nac93 and . Nachef, Modélisation des systèmes distribués, Technique et Science Informatiques, vol.12, issue.2, pp.163-192, 1993.

W. Nebel and G. Schumacher, Object Oriented Hardware Modeling -Where to apply and what are the objects, Proceedings of the European Design Automation Conference with Euro-VHDL, pp.428-433, 1996.

R. B. Ortega and G. Borriello, Communication synthesis for embedded systems with global considerations, Proceedings of 5th International Workshop on Hardware/Software Co Design. Codes/CASHE '97, pp.69-73, 1997.
DOI : 10.1109/HSC.1997.584581

C. Y. Park, Predicting program execution times by analyzing static and dynamic program paths, Real-Time System, pp.31-62, 1993.
DOI : 10.1007/bf01088696

Z. Peng, J. Fagerstrsm, and K. Kuchcinski, A Unified Approach to Evaluation and Design of Hardware/Software Systems, 1991.

Z. Peng and K. Kuchcinski, An Algorithm for Partitioning of Application Specific Systems, Proceedings of the European Design Automation Conference (EDAC), pp.316-321, 1993.

P. Puschner and C. Koza, Calculating the maximum execution time of real-time programs, Real-Time Systems, vol.20, issue.1, pp.159-176, 1989.
DOI : 10.1007/BF00571421

C. Ramachandran, F. J. Kurdahi, D. Gajski, V. Chaiyakul, and A. Wu, Accurate layout area and delay modeling for system level design, IEEE/ACM International Conference on Computer-Aided Design, 1992.
DOI : 10.1109/ICCAD.1992.279347

K. Ramamritham and J. A. Stankovic, Scheduling algorithms and operating systems support for real-time systems, Proceedings of the IEEE, vol.82, issue.1, 1994.
DOI : 10.1109/5.259426
URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.107.4879

M. Rim and R. Jain, Estimating lower-bound performance of schedules using a relaxation technique, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors, pp.290-294, 1992.
DOI : 10.1109/ICCD.1992.276272

A. Sharma and R. Jain, Estimating architectural resources and performance for high-level synthesis applications, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.1, issue.2, pp.175-190, 1993.
DOI : 10.1109/92.238417

L. Sha, R. Rajkumar, and S. S. Sathaye, Generalized rate-monotonic scheduling theory: A framework for developing real-time systems, Proceedings of the IEEE, vol.82, issue.1, 1994.

K. G. Shin and P. Ramanathan, Real-time computing: a new discipline of computer science and engineering, Proceedings of the IEEE, 1994.
DOI : 10.1109/5.259423

J. Staunstrup, Toward a Common Model of Software and Hardware Components, in Codesign: Computer-Aided Software/Hardware Engineering, pp.117-127, 1995.

J. Staunstrup and W. Wolf, Hardware/Software Co-Design: Principles and Practice, Sun98] Sun Microsystems, 1997.
DOI : 10.1007/978-1-4757-2649-7

K. Suzuki and A. S. Vincentelli, Efficient Software Performance Estimation Methods for Hardware/Software Co-design, DAC'96) 33 rd Design Automation Conference, 1996.

D. Thomas, J. Adams, and H. Schmit, A model and methodology for hardwaresoftware codesign, IEEE Design & Test of Computers, 1993.
DOI : 10.1109/54.232468

A. H. Timmer, M. J. Heijligers, J. A. Jessvah94b-]-f, D. D. Vahid, F. Gajski et al., Fast System-Level Area-Delay Curve Prediction A New Method for Rapid Hardware Estimation during Hardware/Software Functional Partitioning SpecCharts: A VHDL Front End for Embedded Systems, Proc. 1 st APCHDLVer96] S. Vercauteren, B. Lin, H. de Man, Constructing Application Specific Heterogeneous Embedded Architecture from Custom HW/SW Application, Proceedings of the IEEE Design Automation Conference, pp.198-207, 1993.

M. Voss, Towards a theory for hardware/software codesign, Third International Workshop on Hardware/Software Codesign, pp.173-180, 1994.
DOI : 10.1109/HSC.1994.336709
URL : https://hal.archives-ouvertes.fr/hal-00008150

W. Ye, R. Ernst, . Th, J. Benner, and . Henkel, Fast timing analysis for hardware-software co-synthesis, Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93, pp.452-457, 1993.
DOI : 10.1109/ICCD.1993.393335

W. Ti-yen and . Wolf, Sensitivity-Driven Co-Synthesis of Distributed Embedded Systems Performance estimation for real-time distributed embedded systems, Eighth International Symposium on System Synthesis Proceedings, IEEE International Conference on Computer Design, pp.4-9, 1995.

J. Wilberg, R. Camposano, and W. , Design Flow for Hardware/Software Co-Synthesis of a Video Compression System, Proceedings of the Third International Workshop on Hardware/Software Codesign, pp.73-80, 1994.

W. Wolf and J. C. Martinez, C Program Performance Estimation for Embedded Systems Architecture Sizing, in International Workshop on Hardware-Software Co-Design, p.12, 1993.

W. Wolf, An architectural co-synthesis algorithm for distributed, embedded computing systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.5, issue.2, 1994.
DOI : 10.1109/92.585225

N. Woo, W. Wolf, and A. Dunlop, Compilation of a single specification into hardware and software, Int'l Workshop on Hardware-Software Codesign, 1992.