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Exploration d'architectures et allocation/affectation mémoire dans les systèmes multiprocesseurs mono puce = Architectures exploration and memory allocation/assignment in multiprocessor SoC

Abstract : The last years saw a great evolution in the manufacture technology of the integrated circuits. Indeed they were marked by the appearance of heterogeneous systems on-chip. The latter are increasingly complex and integrate dedicated or specific material parts, such as the memories of various types, but also of the programmable parts as processors for example.
Many applications in fields such as the multi-media ones (audio and video) and the image processing handle very bulky and strongly dependent data, they consequently, require the integration of a great number of memories of various types and sizes in multi-task multiprocessor systems-on-chip. In many of these embedded applications, the area cost is for a large part dominated by the memories and a very large part of the power consumption is due to the data storage and transfer between the architecture parts.
To face such a complexity and to make it possible for the designer to satisfy the time-to-market constraints, a coherent and complete methodology of design of multi-task multiprocessor architectures with integrated shared memories is required.
In this thesis, we develop an automatic application-specific shared memory architecture design flow, starting from a parallel system level description of a given application.. We propose an exact method, which consists of an integer linear programming model to resolve the memory blocks allocation problem in multiprocessor on-chip architectures. The proposed model gives an exact and optimal solution for the fixed criteria (total access time to the shared data and the cost of the memory architecture). Taking into account the linear program's results, we perform automatically the application-code and architecture transformations corresponding to the chosen memory architecture, and generate a macro-architecture level description of the application.
The feasibility and the performances of this methodology were tested on a VDSL application.
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https://tel.archives-ouvertes.fr/tel-00002939
Contributor : Lucie Torella <>
Submitted on : Tuesday, June 3, 2003 - 4:19:25 PM
Last modification on : Friday, December 11, 2020 - 8:28:03 AM

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S. Meftali. Exploration d'architectures et allocation/affectation mémoire dans les systèmes multiprocesseurs mono puce = Architectures exploration and memory allocation/assignment in multiprocessor SoC. Autre [cs.OH]. Institut National Polytechnique de Grenoble - INPG, 2002. Français. ⟨tel-00002939⟩

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