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Synthèse automatique de circuits asynchrones QDI

Abstract : Contrary to the synchronous circuits, the asynchronous circuits operate with a mechanism of local synchronization (without clock signal). Since many years, they showed their relevance with respect to the synchronous circuits thanks to their properties of robustness, low power, low noise and modularity. However, the current lack of design methods and associated tools prevents them from being widely spread. This dissertation deals with a new design methodology for quasi-delay insensitive integrated asynchronous circuits (QDI). The QDI circuits are the most robust class of the practical asynchronous circuits, which is an advantageous property for upcoming technologies.
The suggested design method allows on the one hand to model circuits in a high-level language, and on the other hand to generate circuits using only elementary logical gates and Muller gates. This method was prototyped by the development of an automatic design tool for asynchronous circuits, namely TAST (“TIMA Asynchronous Synthesis Tools”). It is a design environment mainly made up of a compiler and a synthesizer targeting QDI asynchronous circuits with various handshaking protocols (sequential, WCHB, PCHB and PCFB) from high level descriptions (language based on concurrent communicating processes). The result produced by the synthesizer is a VHDL gate netlist which can target either an asynchronous specific technology, or a standard cell library (precaracterized circuits or FPGAs).
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Contributor : Lucie Torella <>
Submitted on : Tuesday, June 3, 2003 - 3:54:09 PM
Last modification on : Friday, December 11, 2020 - 8:28:03 AM
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  • HAL Id : tel-00002937, version 1




Anh Vu Dinh Duc. Synthèse automatique de circuits asynchrones QDI. Autre [cs.OH]. Institut National Polytechnique de Grenoble - INPG, 2003. Français. ⟨tel-00002937⟩



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