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71 documents classés par : Date Titre Nom du premier auteur Type de documents Date de dépôt

1 - 2 - 3 - 4

Amélioration de performance de la simulation des modèles décrits en langages de description de matériel Morawiec A. Université Joseph-Fourier - Grenoble I (2000-10-26), MERMET Jean (Dir.) [tel-00002983 - version 1]

Etude d'un coeur de processeur pour l'arithmétique exacte Coissard V. Institut National Polytechnique de Grenoble - INPG (2000-09-02), GUYOT Alain (Dir.) [tel-00002997 - version 1]

Cosimulation multiniveaux dans un flot de conception multilangage Lemarrec P. Institut National Polytechnique de Grenoble - INPG (2000-06-28), A.A. Jerraya (Dir.) [tel-00163544 - version 1]

Synthèse comportementale basée sur l'ordonnancement Sugar Z. Institut National Polytechnique de Grenoble - INPG (2000-05-15), A.A. Jerraya (Dir.) [tel-00163733 - version 1]

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Architectures logicielles et matérielles Amblard P. et al (2000) pp [hal-00188048 - version 1]

Design of new optimized architecture processor for DWT Souani C. et al Real-Time Imaging Aug.; 6(4) (2000) 297-312 [hal-00081613 - version 1]

A communication synthesis approach for distributed systems Zitouni A. et al Revue Technique et Science Informatiques (TSI) April ; 19(4) (2000) 515-47 [hal-00081540 - version 1]

VLSI design of 1-D DWT architecture with parallel filters Souani C. et al Integration,-The-VLSI-Journal Sept. ; 29(2) (2000) 181-206 [hal-00081537 - version 1]

Interoperability of ATM-Ethernet interworking system: design and congestion control Ouni R. et al 1st-European-Conference-on-Universal-Multiservice-Networks.-ECUMN'2000-Cat.-No.00EX423., France (2000) [hal-00081529 - version 1]

Design rules for non-Manhattan shapes Juneidi Z. et al Proceedings-of-the-SPIE-The-International-Society-for-Optical-Engineering., United States (2000) [hal-00081520 - version 1]

Proceedings of 6th IEEE InternationalOn-Line Testing Workshop (IOLT 2000), July 3-5, 2000 Palma De Mallorca, Spain Nicolaidis M. et al (2000) 220 pages [hal-00016843 - version 1]

Proceedings on Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS (DTIP of MEMS/MOEMS ), Paris, France, 9-11 May 2000 Courtois B. et al (2000) 594 pages [hal-00016741 - version 1]

5th International Workshop on THERMAL INVESTIGATIONS of ICs and MICROSTRUCTURES (THERMINIC 1999), October 3-6, 1999, ROME, Italy: Special Issue, Microelectronics Journal Rencz M. et al (2000) Volume 31, Issues 9-10, 725-824 [hal-00016739 - version 1]

Proceedings on 6th International Workshop on THERMal INvestigations of ICs and Systems (THERMINIC 2000), September 24-27, 2000, Budapest, Hungary Courtois B. et al (2000) 275 pages [hal-00016718 - version 1]

Micro-accéléromètre intégré 3 axes Jeannot J.C. et al In Microcapteurs et microsystèmes intégrés (NMT, Nano et Micro Technologies) (2000) Vol. 1 N°1 [hal-00016266 - version 1]

Using macros to mimic VHDL in ACL2 Borrione D. et al In Computer-Aided Reasoning: ACL2 Case Studies (2000) 162-185 [hal-00016265 - version 1]

Optimal detector design for on-line testing of linear analog systems Simeu E. VLSI-Design 11(1) (2000) 59-74 [hal-00015855 - version 1]

Analytical redundancy based approach for concurrent fault detection in linear digital systems Abdelhay A. et al In Proceedings-6th-IEEE-International-On-Line-Testing-Workshop-Cat.-No.PR00646 - Proceedings-6th-IEEE-International-On-Line-Testing-Workshop-Cat.-No.PR00646, Spain (2000) [hal-00015850 - version 1]

High level synthesis methodology for on-line testability optimization Naal M.A. et al In Proceedings-6th-IEEE-International-On-Line-Testing-Workshop-Cat.-No.PR00646 - Proceedings-6th-IEEE-International-On-Line-Testing-Workshop-Cat.-No.PR00646, Spain (2000) [hal-00015849 - version 1]