248 articles – 2008 Notices  [english version]
.:. Consultation > Liste par année > 1995 .:.
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fulltext access Modélisation comportementale des circuits analogiques et mixtes
LEMERY F.
Institut National Polytechnique de Grenoble - INPG (1995-12-20), COURTOIS B. (Dir.) [tel-00010774 - version 1]
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Proceedings on 1st International On-Line Testing Workshop (IOLT'95), July 4-5, 1995, Nice, France
Nicolaidis M. et al
(1995) 252 pages [hal-00017277 - version 1]
Application of NARMAX modelling to eddy current brake process
Simeu E.
In Proceedings-of-the-4th-IEEE-Conference-on-Control-Applications-Cat.-No.95CH35764 - Proceedings-of-the-4th-IEEE-Conference-on-Control-Applications-Cat.-No.95CH35764, France (1995) [hal-00016043 - version 1]
Efficient synthesis of fault-tolerant controllers
Rochet R. et al
In Proceedings.-The-European-Design-and-Test-Conference.-ED&TC-1995-Cat.-No.95TH8058 - Proceedings.-The-European-Design-and-Test-Conference.-ED&TC-1995-Cat.-No.95TH8058, France (1995) [hal-00015114 - version 1]
Efficiency comparison of signature monitoring schemes for FSMs
Rochet R. et al
In Proceedings-of-the-ASP-DAC'95/CHDL'95/VLSI'95.-Asia-and-South-Pacific-Design-Automation-Conference.-IFIP-International-Conference-on-Computer-Hardware-Description-Languages-and-their-Applications.-IFIP-Interntional-Conference-on-Very-Large-Scale-Integrati - Proceedings-of-the-ASP-DAC'95/CHDL'95/VLSI'95.-Asia-and-South-Pacific-Design-Automation-Conference.-IFIP-International-Conference-on-Computer-Hardware-Description-Languages-and-their-Applications.-IFIP-Interntional-Conference-on-Very-Large-Scale-Integrati, Japan (1995) [hal-00015106 - version 1]
Design of defect-tolerant scan chains for MCMs with an active substrate
Brahic P. et al
In Proceedings-the-IEEE-International-Workshop-on-Defect-and-Fault-Tolerance-in-VLSI-Systems-95TB100009 - Proceedings-the-IEEE-International-Workshop-on-Defect-and-Fault-Tolerance-in-VLSI-Systems-95TB100009, United States (1995) [hal-00015103 - version 1]
Spread and folded architectures for FFT
VACHER A. et al
In Proceedings-of-the-Twenty-Seventh-Southeastern-Symposium-on-System-Theory. - Proceedings-of-the-Twenty-Seventh-Southeastern-Symposium-on-System-Theory., United States (1995) [hal-00014945 - version 1]
Radix-8 butterflies for folded FFT
VACHER A. et al
In Proceedings-of-the-Twenty-Seventh-Southeastern-Symposium-on-System-Theory. - Proceedings-of-the-Twenty-Seventh-Southeastern-Symposium-on-System-Theory., United States (1995) [hal-00014944 - version 1]
Application of fast layout synthesis environment to dividers evaluation
Houelle A. et al
In Proceedings-of-the-12th-Symposium-on-Computer-Arithmetic-Cat.-No.95CB35822. - Proceedings-of-the-12th-Symposium-on-Computer-Arithmetic-Cat.-No.95CB35822., United Kingdom (1995) [hal-00014936 - version 1]
Svoboda-Tung division with no compensation
Montalvo L.-A. et al
In Proceedings-of-the-8th-International-Conference-on-VLSI-Design-Cat.-No.95TH802. - Proceedings-of-the-8th-International-Conference-on-VLSI-Design-Cat.-No.95TH802., India (1995) [hal-00014932 - version 1]
SAGA: the first general-purpose on-line arithmetic co-processor
Skaf A. et al
In Proceedings-of-the-8th-International-Conference-on-VLSI-Design-Cat.-No.95TH802. - Proceedings-of-the-8th-International-Conference-on-VLSI-Design-Cat.-No.95TH802., India (1995) [hal-00014930 - version 1]
Comparison of the layout synthesis of radix-2 and pseudo-radix-4 dividers
Guyot A. et al
In Proceedings-of-the-8th-International-Conference-on-VLSI-Design-Cat.-No.95TH802. 1995: - Proceedings-of-the-8th-International-Conference-on-VLSI-Design-Cat.-No.95TH802. 1995:, India (1995) [hal-00014929 - version 1]
DCFL- and DPTL-based approaches to self-timed GaAs circuits
Ribas R.P. et al
In ESSCIRC-'95.-Twenty-First-European-Solid-State-Circuits-Conference.-Proceedings. - ESSCIRC-'95.-Twenty-First-European-Solid-State-Circuits-Conference.-Proceedings., France (1995) [hal-00014927 - version 1]
Macromodelling of pass-transistor logic circuits
Vassileva T. et al
In ECCTD-'95-Proceedings-of-the-12th-European-Conference-on-Circuit-Theory-and-Design. - ECCTD-'95-Proceedings-of-the-12th-European-Conference-on-Circuit-Theory-and-Design., Turkey (1995) [hal-00014708 - version 1]
Delay directed adder synthesis and optimization
Tchoumatchenko V. et al
In ECCTD-'95-Proceedings-of-the-12th-European-Conference-on-Circuit-Theory-and-Design. - ECCTD-'95-Proceedings-of-the-12th-European-Conference-on-Circuit-Theory-and-Design., Turkey (1995) [hal-00014707 - version 1]
Denotational semantics of a synchronous VHDL subset
Borrione D. et al
Formal-Methods-in-System-Design Aug. ; 7(1-2) (1995) 53-71 [hal-00014235 - version 1]
Design error diagnosis in sequential circuits
Wahba A. et al
In Correct-Hardware-Design-and-Verification-Methods.-IFIP-WG-10.5-Advanced-Research-Working-Conference,-CHARME-'95.-Proceedings. - Correct-Hardware-Design-and-Verification-Methods.-IFIP-WG-10.5-Advanced-Research-Working-Conference,-CHARME-'95.-Proceedings., Germany (1995) [hal-00014234 - version 1]