| Fiche détaillée | Communications avec actes |
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| 20th IEEE/IFIP International Symposium on Rapid System Prototyping(RSP'09), Paris : France (2009) |
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| Synthesis of communication mechanisms for multi-tile systemsbased on heterogeneous Multi-processor System-on-Chips |
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| A. Chagoya-Garzon1X. Guérin1F. Rousseau1F. Pétrot1D. Rossetti2A. Lonardo2P. Vicini2P.S. Paolucci3 |
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| Current multimedia applications give birth to a I number of complex heterogeneous multiprocessor architectures with specific communication infrastructure designed to achieve their demanding requirements. To obtain higher computational power with these multi-processor system on chips (MPSoCs), it is possible to connect several of them together through a specific network fabric, supported by dedicated network processors, reaching complexity levels too high for the general application programmer to cope with. This paper describes a flexible and efficient software implementation of communication mechanisms for such architectures, which masks the complexity of the communication infrastructure to the application programmer. |
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| 1 : | TIMA - Techniques of Informatics and Microelectronics for integrated systems Architecture |
| 2 : | INFN Roma Tre |
| 3 : | ATMEL - Atmel Corporation |
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| system-on-chip – communication-services |
| hal-00419036, version 1 | |
| http://hal.archives-ouvertes.fr/hal-00419036 | |
| oai:hal.archives-ouvertes.fr:hal-00419036 | |
| Contributeur : Lucie Torella | |
| Soumis le : Mardi 22 Septembre 2009, 15:03:45 | |
| Dernière modification le : Mardi 22 Septembre 2009, 15:03:45 | |