.:. Consultation > Liste par auteurs > Vestman .:.

1 document

An approach to Verilog-VHDL interoperability for synchronous designs Borrione D. et al Dans Advances-in-Hardware-Design-and-Verification.-IFIP-TC10-WG10.5-International-Conference-on-Correct-Hardware-and-Verification-Methods - Advances-in-Hardware-Design-and-Verification.-IFIP-TC10-WG10.5-International-Conference-on-Correct-Hardware-and-Verification-Methods, Canada (1997) [hal-00014173 - version 1]