248 articles – 2008 Notices  [english version]
.:. Consultation > Liste par auteurs > Beyrouthy .:.
14 documents classés par :
An asynchronous FPGA block with its tech-mapping algorithm dedicated to security applications
Beyrouthy T. et al
International Journal of Reconfigurable Computing 2013, Article ID 517947 (2013) 12 pages [hal-00819126 - version 1]
An event-driven FIR filter: Design and implementation
Beyrouthy T. et al
In Proc. of 22nd IEEE International Symposium on Rapid System Prototyping (RSP'11) - 22nd IEEE International Symposium on Rapid System Prototyping (RSP'11), Germany (2011) [hal-00646298 - version 1]
Combined Peak and Level-Crossing Sampling Scheme
Greitans M. et al
Dans Proc. of 9th International Conference on Sampling Theory and Applications (SampTA'11) - 9th International Conference on Sampling Theory and Applications (SampTA'11), Singapour (2011) [hal-00646274 - version 1]
An Asynchronous FIR Filter Architecture coupled to a Level-Crossing ADC
Beyrouthy T. et al
Dans 9th International Conference on Sampling Theory and Applications (SampTA'11) - 9th International Conference on Sampling Theory and Applications (SampTA'11), Singapour (2011) [hal-00646262 - version 1]
fulltext access Logique programmable asynchrone pour systèmes embarqués sécurisés
Beyrouthy T.
Institut National Polytechnique de Grenoble - INPG (02/11/2009), Fesquet L. (Dir.) [tel-00481895 - version 1]
DPA robust S-BOX implementation on a secure asynchronous FPGA
Beyrouthy T. et al
Cryptarchi Conference, Czech republic, June 24-27, Tchèque, République (2009) [hal-00422280 - version 1]
A secure asynchronous FPGA for an embedded system
Fesquet L. et al
PhD Forum DATE, France (2009) [hal-00416804 - version 1]
Updates on the Potential of Clock-Less Logics to Strengthen Cryptographic Circuits against Side-Channel Attacks
Guilley S. et al
Dans IEEE International Conference on Electronics and Systems (ICECS'09) - IEEE International Conference on Electronics and Systems (ICECS'09), Tunisie (2009) [hal-00472064 - version 1]
A secure asynchronous configurable cell: an embedded programmable logic for smartcards
Fesquet L. et al
Workshop on Cryptographic Architectures embedded in reconfigurable devices (CryptArchi'08), France (2008) [hal-00293681 - version 1]
A Secure Programmable Architecture with a Dedicated Tech-mapping Algorithm: Application to a Crypto-Processor
Beyrouthy T. et al
Dans Proc. of 23rd International Conference on Design of Circuits and Integrated Systems (DCIS'08) - 23rd International Conference on Design of Circuits and Integrated Systems (DCIS'08), France (2008) [hal-00346734 - version 1]
Physical Design of FPGA Interconnect to Prevent Information Leakage
Chaudhuri S. et al
In Reconfigurable Computing: Architecture, Tools, and Applications (2008) 87-98 [hal-00299487 - version 1]
A Reconfigurable Cell for a Multi-Style Asynchronous FPGA
Hoogvorst P. et al
Dans Proceedings of Reconfigurable Communication-centric SoC (RecoSoC'07) - Reconfigurable Communication-centric SoC (RecoSoC'07), France (2007) [hal-00222887 - version 1]
A novel asynchronous e-FPGA architecture for security applications
Beyrouthy T. et al
Dans Proceedings of International Conference on Field-Programmable Technology (ICFPT'07) - International Conference on Field-Programmable Technology (ICFPT'07), Japon (2007) [hal-00222875 - version 1]
Secure Asynchronous FPGA for Embedded Systems (SAFE)
Beyrouthy T. et al
In Colloque Journées GDR SOC-SIP'07 - Colloque Journées GDR SOC-SIP'07, Paris, France, June 13-15, France (2007) [hal-00178955 - version 1]