282 articles – 2134 Notices  [english version]
.:. Consultation > Liste par année > 1996 .:.
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SEU and latch-up results on transputers
Bezerra F. et al
In RADECS-95 - (1996) [hal-00008255 - version 1]
Robustness against S.E.U. of an artificial neural network space application
Assoum A. et al
In RADECS-95 - (1996) [hal-00008254 - version 1]
Experiments on fault tolerance of artificial neural networks implemented by means of a transputer
Velazco R. et al
Dans Intelligent-Systems-and-Soft-Computing-for-Nuclear-Science-and-Industry.-Proceedings-of-the-2nd-International-FLINS-Workshop. - (1996) [hal-00008253 - version 1]
SEU experiments on an Artificial Neural Network implemented by means of digital processors
Velazco R. et al
IEEE-Transactions-on-Nuclear-Science Dec. 1996; 43(6) pt. 1 (1996) 2889-96 [hal-00008250 - version 1]
Guest editorial
Kaminska B. et al
Journal of Electronic Testing (Historical Archive) August, Volume 9, Numbers 1-2 (1996) 7-8 [hal-00008179 - version 1]
Unified built-in self-test for fully differential analog circuits
Mir S. et al
Journal of Electronic Testing (Historical Archive) August, Volume 9, Numbers 1-2 (1996) 135-151 [hal-00008177 - version 1]
Fault-based testing and diagnosis of balanced filters
Mir S. et al
Analog Integrated Circuits and Signal Processing (Historical Archive) September, Volume 11, Number 1 (1996) 5-19 [hal-00008175 - version 1]
A system-level communication synthesis approach for hardware/software systems
Ben-Ismail T. et al
Microprocessors and Microsystems Volume 20, Issue 3 , May 1996 (1996) 149-157 [hal-00008163 - version 1]
Co-specification for co-design in the development of avionics systems
Sahroui A.E.K. et al
Control Engineering Practice Volume 4, Issue 6 , June 1996 (1996) 871-876 [hal-00008162 - version 1]
Linking architectural synthesis with register transfer level design tools
Aichouchi M. et al
Technique-et-Science-Informatiques. 15(2) (1996) 179-199 [hal-00008133 - version 1]
Automatic generation of interfaces for distributed C-VHDL cosimulation of embedded systems: an industrial experience
Valderrama C. et al
In Proceedings.-Seventh-IEEE-International-Workshop-on-Rapid-System-Prototyping.-Shortening-the-Path-from-Specification-to-Prototyping - (1996) [hal-00008130 - version 1]
Combined control flow dominated and data flow dominated high-level synthesis
Berrebi E. et al
In 33rd-Design-Automation-Conference.-Proceedings - (1996) [hal-00008128 - version 1]
Design of an adaptive motors controller based on fuzzy logic using behavioural synthesis
Changuel A. et al
Dans Proceedings-EURO-DAC-'96.-European-Design-Automation-Conference-with-EURO-VHDL-'96-and-Exhibition- - (1996) [hal-00008122 - version 1]
Analysis of different protocol description styles in VHDL for high-level synthesis
Pirmez L. et al
Dans Proceedings-EURO-DAC-'96.-European-Design-Automation-Conference-with-EURO-VHDL-'96-and-Exhibition - (1996) [hal-00008121 - version 1]
Partitioning of VLSI systems from a high-level specification
Ismail T. et al
Technique et Science Informatiques (TSI) Vol.15 N° 8/1996 (1996) 1131-65 [hal-00008120 - version 1]
A hardware/software codesign case study: design of a robot arm controller
Abid M. et al
Dans 1996 European Design and Test Conference (ED&TC '96) - (1996) [hal-00008024 - version 1]
Address calculation for retargetable compilation and exploration of instruction-set architectures
Liem C. et al
Dans Proceedings of the 33rd annual conference on Design automation - (1996) [hal-00008023 - version 1]
Exploration of hardware/software design space through a codesign of robot arm controller
Abid M. et al
Dans EURO-DAC '96 European Design Automation Conference with EURO-VHDL '96 - (1996) [hal-00008022 - version 1]
Applied design and analysis of microsystems
Karam J.M. et al
Dans 1996 European Design and Test Conference (ED&TC '96) - (1996) [hal-00007991 - version 1]
Guest Editors' Introduction: Mixed Analog and Digital Systems
Kaminska B. et al
IEEE Design and Test of Computers Summer 1996 (Vol. 13, No. 2) (1996) 8-9 [hal-00007990 - version 1]