.:. Consultation > Liste par année > 1996 .:.

74 documents classés par : Date Titre Nom du premier auteur Type de documents Date de dépôt

1 - 2 - 3 - 4

HDL-based integration of formal methods and CAD tools in the PREVAIL environment Borrione D. et al Dans Formal-Methods-in-Computer-Aided-Design.-First-International-Conference,-FMCAD-'96-Proceedings. - Formal-Methods-in-Computer-Aided-Design.-First-International-Conference,-FMCAD-'96-Proceedings., États-Unis (1996) [hal-00014192 - version 1]

Achieving fault secureness in parity prediction arithmetic operators: general conditions and implementations Nicolaidis M. et al Dans Proceedings.-European-Design-and-Test-Conference-ED&TC-96-Cat.-No.96TB100027 - Proceedings.-European-Design-and-Test-Conference-ED&TC-96-Cat.-No.96TB100027, France (1996) [hal-00013892 - version 1]

Enhancing realistic fault secureness in parity prediction array arithmetic operators by I/sub DDQ/ monitoring Manich S. et al Dans Proceedings.-14th-IEEE-VLSI-Test-Symposium-Cat.-No.96TB100043 - Proceedings.-14th-IEEE-VLSI-Test-Symposium-Cat.-No.96TB100043, États-Unis (1996) [hal-00013891 - version 1]

Theory of transparent BIST for RAMs Nicolaidis M. IEEE Transactions on Computers Oct. ; 45(10): (1996) 1141-56 [hal-00013890 - version 1]

E-groups: a new technique for fast backward propagation in system-level test generation Nicolaidis M. et al Dans Proceedings-of-the-Fifth-Asian-Test-Symposium-ATS-'96-Cat.-No.96TB100072. 1996: - Proceedings-of-the-Fifth-Asian-Test-Symposium-ATS-'96-Cat.-No.96TB100072. 1996:, Taïwan, Province De Chine (1996) [hal-00013889 - version 1]

Automatic test generation for maximal diagnosis of linear analog circuits Courtois B. et al Dans Proceedings.-European-Design-and-Test-Conference-ED&TC-96 - Proceedings.-European-Design-and-Test-Conference-ED&TC-96, France (1996) [hal-00013277 - version 1]

ABILBO: Analog BuILt-in block observer Lubaszewski M. et al Dans 1996-IEEE/ACM-International-Conference-on-Computer-Aided-Design.-Digest-of-Technical-Papers- - 1996-IEEE/ACM-International-Conference-on-Computer-Aided-Design.-Digest-of-Technical-Papers-, États-Unis (1996) [hal-00013268 - version 1]

Fault-based ATPG for linear analog circuits with minimal size multifrequency test sets Courtois B. et al Journal of Electronic Testing: Theory and Application 9(1-2) (1996) 43-57 [hal-00013266 - version 1]

Unified built-in self-test for fully differential analog circuits Courtois B. et al Journal of Electronic Testing: Theory and Application 9(1-2) (1996) 135-51 [hal-00013263 - version 1]

Design of high-performance band-pass sigma-delta modulator with concurrent error detection Francesconi F. et al Dans Proceedings-of-the-Third-IEEE-International-Conference-on-Electronics,-Circuits,-and-Systems.-ICECS-'96 - Proceedings-of-the-Third-IEEE-International-Conference-on-Electronics,-Circuits,-and-Systems.-ICECS-'96, France (1996) [hal-00013194 - version 1]

Asynchronous SRT dividers: the real cost Boutamine H. et al Dans Proceedings.-European-Design-and-Test-Conference-ED&TC-96-Cat.-No.96TB100027 - Proceedings.-European-Design-and-Test-Conference-ED&TC-96-Cat.-No.96TB100027, France (1996) [hal-00012050 - version 1]

A new asynchronous pipeline scheme: application to the design of a self-timed ring divider Renaudin M. et al IEEE Journal of Solid State Circuits Volume 31, Issue 7, July (1996) 1001 - 1013 [hal-00012049 - version 1]

Self timed division and square-root extraction Guyot A. et al Dans Proceedings.-Ninth-International-Conference-on-VLSI-Design-Cat.-No.96TB100010 - Proceedings.-Ninth-International-Conference-on-VLSI-Design-Cat.-No.96TB100010, Inde (1996) [hal-00012048 - version 1]

Functionally asynchronous array processor for morphological filtering of greyscale images Robin F. et al Dans IEE-Proceedings-Computers-and-Digital-Techniques - IEE-Proceedings-Computers-and-Digital-Techniques, États-Unis (1996) [hal-00011229 - version 1]

Real-time spike detection in EEG signals using the wavelet transform and a dedicated digital signal processor card Clarençon D. et al Journal of Neuroscience Methods 70(1): Dec. (1996) 5-14 [hal-00011227 - version 1]

An asynchronous 16*16 pixel array-processor for morphological filtering of greyscale images Robin F. et al Dans ESSCIRC-'96.-Proceedings-of-the-22nd-European-Solid-State-Circuits-Conference - ESSCIRC-'96.-Proceedings-of-the-22nd-European-Solid-State-Circuits-Conference, Suisse (1996) [hal-00011215 - version 1]

SEU-hardened storage cell validation using a pulsed laser Velazco R. et al IEEE-Transactions-on-Nuclear-Science. Dec. 1996; 43(6) pt. 1 (1996) 2843-8 [hal-00008252 - version 1]

Upset hardened memory design for submicron CMOS technology Calin T. et al IEEE-Transactions-on-Nuclear-Science. Dec. 1996; 43(6) pt. 1 (1996) 2874-8 [hal-00008251 - version 1]

TILMICRO, a new SEU and latch-up tester for microprocessors: initial results on 32-bit floating point DSPs Bezerra F. et al Dans RADECS-95 - (1996) [hal-00008256 - version 1]

SEU and latch-up results on transputers Bezerra F. et al Dans RADECS-95 - (1996) [hal-00008255 - version 1]