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Contribution à NAUTILE : un environnement pour la compilation du silicium Bondono P. Institut National Polytechnique de Grenoble - INPG (1989-12-08), Bernard Courtois (Dir.) [tel-00335600 - version 1]

Test aux ions lourds de VLSI programmables Provost-Grellier A. Institut National Polytechnique de Grenoble - INPG (1989-11-17), Raoul Velazco (Dir.) [tel-00334460 - version 1]

Contribution à la définition et à la mise en œuvre de NAUTILE Hornik A. Institut National Polytechnique de Grenoble - INPG (1989-06-06), Bernard Courtois (Dir.) [tel-00333065 - version 1]

N/A : [({datebrevet})]

ASYL: a logic and architecture design automation system Crastes-De-Paulet M. et al In Euro-ASIC-89 - Euro-ASIC-89, France (1989) [hal-00015360 - version 1]

Built-in concurrent checking of ASICs Delord X. et al In Euro-ASIC-89 - Euro-ASIC-89, France (1989) [hal-00015357 - version 1]

Reconfiguration in a microprocessor: practical results Leveugle R. et al In ESPRIT-'89.-Proceedings-of-the-6th-Annual-ESPRIT-Conference-EUR-12512 - ESPRIT-'89.-Proceedings-of-the-6th-Annual-ESPRIT-Conference-EUR-12512, Belgium (1989) [hal-00015355 - version 1]

Optimized synthesis of dedicated controllers with concurrent checking capabilities Leveugle R. et al In International-Test-Conference-1989.-Proceedings.-Meeting-the-Tests-of-Time-Cat.-No.89CH2742-5 - International-Test-Conference-1989.-Proceedings.-Meeting-the-Tests-of-Time-Cat.-No.89CH2742-5, United States (1989) [hal-00015350 - version 1]

A channelless layout for multilevel synthesis with compiled cells Saucier G. et al In Proceedings.-1989-IEEE-International-Conference-on-Computer-Design:-VLSI-in-Computers-and-Processors-Cat.-No.89CH2794-6 - Proceedings.-1989-IEEE-International-Conference-on-Computer-Design:-VLSI-in-Computers-and-Processors-Cat.-No.89CH2794-6, United States (1989) [hal-00015347 - version 1]

Concurrent checking in dedicated controllers Leveugle R. et al In Proceedings.-1989-IEEE-International-Conference-on-Computer-Design:-VLSI-in-Computers-and-Processors-Cat.-No.89CH2794-6 - Proceedings.-1989-IEEE-International-Conference-on-Computer-Design:-VLSI-in-Computers-and-Processors-Cat.-No.89CH2794-6, United States (1989) [hal-00015343 - version 1]

Highly wireable multilevel synthesis with compiled cells Leveugle R. et al In Logic-and-Architecture-Synthesis-for-Silicon-Compilers.-Proceedings-of-the-International-Workshop - Logic-and-Architecture-Synthesis-for-Silicon-Compilers.-Proceedings-of-the-International-Workshop, France (1989) [hal-00015340 - version 1]

Design of an application specific microprocessor Leveugle R. et al In Logic-and-Architecture-Synthesis-for-Silicon-Compilers.-Proceedings-of-the-International-Workshop - Logic-and-Architecture-Synthesis-for-Silicon-Compilers.-Proceedings-of-the-International-Workshop, France (1989) [hal-00015339 - version 1]

JANUS, an on-line multiplier/divider for manipulating large numbers Guyot A. et al In Proceedings-of-9th-Symposium-on-Computer-Arithmetic-Cat.-No.89CH2757-3. - Proceedings-of-9th-Symposium-on-Computer-Arithmetic-Cat.-No.89CH2757-3., United States (1989) [hal-00014975 - version 1]

Functional modelling and testing of digital circuits Borrione D. et al Revue Technique et Science Informatiques (TSI) 8(6) (1989) 523-44 [hal-00014306 - version 1]

Zero-defect designs, why and how: formal verification vs. automated synthesis Borrione D. et al In Information-Processing-89.-Proceedings-of-the-IFIP-11th-World-Computer-Congress. - Information-Processing-89.-Proceedings-of-the-IFIP-11th-World-Computer-Congress., France (1989) [hal-00014303 - version 1]

Formal verification of microprogrammed architectures Borrione D. et al In CAD-&-CG-'89-Beijing.-Proceedings-of-International-Conference-on-Computer-Aided-Design-and-Computer-Graphics. - CAD-&-CG-'89-Beijing.-Proceedings-of-International-Conference-on-Computer-Aided-Design-and-Computer-Graphics., China (1989) [hal-00014299 - version 1]

A generalized theory of fail-safe systems Nicolaidis M. et al In FTCS-19-Digest-of-Papers.-The-Nineteenth-International-Symposium-on-Fault-Tolerant-Computing-Cat.-No.89CH2754-0. 1989: - FTCS-19-Digest-of-Papers.-The-Nineteenth-International-Symposium-on-Fault-Tolerant-Computing-Cat.-No.89CH2754-0. 1989:, United States (1989) [hal-00014059 - version 1]

Self-exercising checkers for unified built-in self-test (UBIST) Nicolaidis M. IEEE-Transactions-on-Computer-Aided-Design-of-Integrated-Circuits-and-Systems March ; 8(3) (1989) 203-18 [hal-00014058 - version 1]

VLSI implementation for control of critical systems Noraz S. et al In Safety-of-Computer-Control-Systems-1989-SAFECOMP'89-Proceedings-of-the-IFAC/IFIP-Workshop. - Safety-of-Computer-Control-Systems-1989-SAFECOMP'89-Proceedings-of-the-IFAC/IFIP-Workshop., Austria (1989) [hal-00014054 - version 1]

Self-checking logic arrays Nicolaidis M. et al Microprocessors and Microsystems May; 13(4) (1989) 281-90 [hal-00013398 - version 1]