282 articles – 2134 references  [version française]
Short view Conference proceedings
A scalable end effective routing algorithm for multi-FPGA based large scale NoC
Ge Z. et al
Dans GDR SoC SiP - COLLOQUE NATIONAL DU GDR SOC-SIP, Lyon : France (2011) - http://hal-ujm.ccsd.cnrs.fr/ujm-00601664
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Zhiwei Ge1, Junyan Tan ()2, Virginie Fresse ()2, Frederic Rousseau ()3, Sunying Yao1
1:  ASIC Design Center - ASIC Design Center
http://www.tju.edu.cn/english/
University of tianjin
ASIC Design Center No 92, Weijin Road Tianjin university
China
2:  LHC - LAboratoire Hubert Curien [Saint Etienne]
http://laboratoirehubertcurien.fr
CNRS : UMR5516 – Université Jean Monnet - Saint-Etienne
18 rue du Professeur Lauras 42000 SAINT-ETIENNE
France
3:  TIMA - Techniques of Informatics and Microelectronics for integrated systems Architecture
http://tima.imag.fr/
CNRS : UMR5159 – Université Joseph Fourier - Grenoble I – Institut National Polytechnique de Grenoble (INPG)
46 Av Félix Viallet 38031 GRENOBLE CEDEX 1
France
Computer Science/Embedded Systems
A scalable end effective routing algorithm for multi-FPGA based large scale NoC
In the context of the FPGA resource limitation for large scale NoC, multi-FPGA based solutions are proposed. Due to the scalable routing scheme and packet format, the proposed routing algorithm can be used with both intra-FPGA and inter-FPGA communications. The effectiveness of the scheme is that it can be used for any multi-FPGA based NoC with small amount extra resource consumption.
English
2011-06-17

GDR SoC SiP
national
2011-06-18
2 pages

COLLOQUE NATIONAL DU GDR SOC-SIP
2011-06-15
2011-06-17
Lyon
France


cluster ISLE, projet Semba