Three-Dimensional Real-Space Simulation of Surface Roughness in Silicon Nanowire FETs

C. Buran; M.G. Pala; M. Bescond; M. Dubois; M. Mouis

Article in peer-reviewed journal

Three-Dimensional Real-Space Simulation of Surface Roughness in Silicon Nanowire FETs
Buran C. et al
IEEE Transactions on Electron Devices 56, 10 (2009) 2186-2192 - http://hal.archives-ouvertes.fr/hal-00596081

Author(s)

C. Buran¹, M.G. Pala¹, M. Bescond¹, M. Dubois², M. Mouis¹

Laboratory

1:	IMEP-LAHC - Institut de Microélectronique, Electromagnétisme et Photonique - Laboratoire d'Hyperfréquences et Caractérisation

Institut National Polytechnique de Grenoble (INPG) – Université Joseph Fourier - Grenoble I – CNRS : UMR5130 – Université de Savoie

Minatec-INPG 3 parvis Louis Néel BP 257 38016 GRENOBLE CEDEX 1

France

2:	TIMA - Techniques of Informatics and Microelectronics for integrated systems Architecture

http://tima.imag.fr/

CNRS : UMR5159 – Université Joseph Fourier - Grenoble I – Institut National Polytechnique de Grenoble (INPG)

46 Av Félix Viallet 38031 GRENOBLE CEDEX 1

France

Subject

Physics/Condensed Matter/Other

Engineering Sciences/Micro and nanotechnologies/Microelectronics

Title

Three-Dimensional Real-Space Simulation of Surface Roughness in Silicon Nanowire FETs

Fulltext language

English

Production date

2009-10-01

Journal

IEEE Transactions on Electron Devices

Audience

international

Publication date

2009-10-01

Volume

Issue

Page, identifiant, ...

2186-2192


hal-00596081, version 1
http://hal.archives-ouvertes.fr/hal-00596081
oai:hal.archives-ouvertes.fr:hal-00596081
From: Chahla Domenget <>
Submitted on: Thursday, 26 May 2011 14:39:25
Updated on: Sunday, 10 February 2013 23:00:29