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TIMA Laboratory | Publications |  |
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TIMA Laboratory | Publications | |
| Detailed view | Conference, seminar, workshop communication |
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| Invited presentation in IEEE/ACM Symposium on Nanoscale Architectures (NANOARCH'07), San-Jose (CA) : United States (2007) |
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| Dealing with soft errors in nanometric CMOS |
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| M. Nicolaidis1 |
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| Soft-errors have become a major reliability threat in advanced CMOS technologies. In this talk we present a basic mechanisms and classification of soft-errors, practical examples of systems impacted by this issue, soft error trends from 180nm to 45nm process nodes, techniques for circuit qualification including accelerated radiation testing, real time testing, and simulations approaches, and state-of the art, cost-effective soft error mitigation techniques. |
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| 1: | TIMA - Techniques of Informatics and Microelectronics for integrated systems Architecture |
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| nanometric-CMOS-process |
| hal-00226402, version 1 | |
| http://hal.archives-ouvertes.fr/hal-00226402 | |
| oai:hal.archives-ouvertes.fr:hal-00226402 | |
| From: Lucie Torella | |
| Submitted on: Wednesday, 30 January 2008 15:55:04 | |
| Updated on: Wednesday, 30 January 2008 15:55:04 | |