282 articles – 2123 references  [version française]
Detailed view Article in peer-reviewed journal
IEEE-Transactions-on-Computer-Aided-Design-of-Integrated-Circuits-and-Systems April ; 11(4) (1992) 525-40
An SFS Berger check prediction ALU and its application to self-checking processor designs
Lo Jien-Chung1, S. Thanawastien1, T.-R.-N. Rao1, M. Nicolaidis2, 3

A strongly fault secure (SFS) ALU design based on the Berger check prediction (BCP) technique is presented. The fault and error models of a large class of VLSI ALU designs are discussed. The proposed design is proved to be fault-secure and self-testing with respect to any single fault in the ALU part. The proposed BCP ALU is proved to be SFS with any design of BCP circuit. Consequently, a self-checking processor whose data path is encoded entirely in a Berger code can be achieved. An efficient self-checking processor can then be designed.
1:  DEPT. OF ELECTR. & COMPUT. ENG., RHODE ISLAND UNIV. - Dept. of Electr. & Comput. Eng., Rhode Island Univ.
2:  IROC TECHNOLOGIES - iROc Technologies
3:  TIMA - Techniques of Informatics and Microelectronics for integrated systems Architecture
fault-models – BIST- – Berger-check-prediction – self-checking-processor-designs – strongly-fault-secure – error-models – VLSI-ALU – self-testing – Berger-code