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Validation in a component-based design flow for multicore SoCs
G. Nicolescu1, S. Yoo1, A. Bouchhima1, A.A. Jerraya1

Currently, since many SoCs include heterogeneous components such as CPUs, DSPs, ASICs, memories, buses, etc., system integration becomes a major step in the design flow. To enable this integration, we use a design approach called component based-design approach. In this approach, the validation of system integration takes most of design efforts. This paper presents an automatic method of SoCs design validation. Based on a generic simulation wrapper architecture, the presented method provides automatic generation of executable models throughout different stages of SoC design flow. A case study of validating a VDSL application shows the effectiveness of the method.
1:  TIMA - Techniques of Informatics and Microelectronics for integrated systems Architecture
SoCs- – heterogeneous-components – validation- – system-integration – design-validation – generic-simulation-wrapper-architecture – SoC-design-flow – Computer-Aided-Design