284 articles – 2152 references  [version française]
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Testing complex couplings in multiport memories
Nicolaidis M. et al
IEEE-Transactions-on-Very-Large-Scale-Integration-VLSI-Systems March ; 3(1) (1995) 59-71 [hal-00013924 - version 1]
Digital TV: a perspective
Pham N. et al
Dans IEE-Colloquium-on-'Developments-in-the-Eutelsat-System'-Digest-No.1995/015. 1995: - IEE-Colloquium-on-'Developments-in-the-Eutelsat-System'-Digest-No.1995/015. 1995:, Royaume-Uni (1995) [hal-00013920 - version 1]
Design of self-testing RAMs
Yarmolik V.-N. et al
Russian Microelectronics May-June ; 24(3) (1995) 186-90 [hal-00013902 - version 1]
Analytic approach for error masking elimination in on-line multipliers
Bederr H. et al
Dans Proceedings-of-the-12th-Symposium-on-Computer-Arithmetic-Cat.-No.95CB35822 - Proceedings-of-the-12th-Symposium-on-Computer-Arithmetic-Cat.-No.95CB35822, Royaume-Uni (1995) [hal-00013901 - version 1]
Area versus detection latency trade-offs in self-checking memory design
Kebichi O. et al
Dans Proceedings.-The-European-Design-and-Test-Conference.-ED&TC-1995-Cat.-No.95TH8058 - Proceedings.-The-European-Design-and-Test-Conference.-ED&TC-1995-Cat.-No.95TH8058, France (1995) [hal-00013900 - version 1]
Efficient UBIST implementation for microprocessor sequencing parts
Nicolaidis M.
Journal-of-Electronic-Testing:-Theory-and-Applications June ; 6(3) (1995) 295-312 [hal-00013899 - version 1]
A strongly code disjoint built-in current sensor for strongly fault-secure static CMOS realizations
Jien-Chung L. et al
IEEE-Transactions-on-Computer-Aided-Design-of-Integrated-Circuits-and-Systems Nov. ; 14(11) (1995) 1402-7 [hal-00013898 - version 1]
A tool for automatic generation of self-checking data paths
Hamdi B. et al
Dans Proceedings-13th-IEEE-VLSI-Test-Symposium-Cat.-No.95TH8068 - Proceedings-13th-IEEE-VLSI-Test-Symposium-Cat.-No.95TH8068, États-Unis (1995) [hal-00013896 - version 1]
An approach for designing total-dose tolerant MCMs based on current monitoring
Vargas F. Hernan et al
Dans Proceedings.-International-Test-Conference-IEEE-Cat.-No.95CH35858 - Proceedings.-International-Test-Conference-IEEE-Cat.-No.95CH35858, États-Unis (1995) [hal-00013895 - version 1]
Exact aliasing computation for RAM BIST
Kebichi O. et al
Dans Proceedings.-International-Test-Conference-IEEE-Cat.-No.95CH35858 - Proceedings.-International-Test-Conference-IEEE-Cat.-No.95CH35858, États-Unis (1995) [hal-00013894 - version 1]
Upset-tolerant CMOS SRAM using current monitoring: prototype and test experiments
Calin T. et al
Dans Proceedings.-International-Test-Conference-IEEE-Cat.-No.95CH35858 - Proceedings.-International-Test-Conference-IEEE-Cat.-No.95CH35858, États-Unis (1995) [hal-00013893 - version 1]
Analog checkers with absolute and relative tolerances
Courtois B. et al
IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems 14(5): May (1995) 607-12 [hal-00013278 - version 1]
Built-in self-test approaches for analogue and mixed-signal integrated circuits
Courtois B. et al
Dans 38th-Midwest-Symposium-on-Circuits-and-Systems.-Proceedings- - 38th-Midwest-Symposium-on-Circuits-and-Systems.-Proceedings-, Brésil (1995) [hal-00013276 - version 1]
Concurrent error detection in analog and mixed-signal integrated circuits
Lubaszewski M. et al
Dans 38th-Midwest-Symposium-on-Circuits-and-Systems.-Proceedings - 38th-Midwest-Symposium-on-Circuits-and-Systems.-Proceedings, Brésil (1995) [hal-00013274 - version 1]
A fine-grain asynchronous VLSI cellular array processor architecture
Privat G. et al
Dans 1995-IEEE-Symposium-on-Circuits-and-Systems-Cat.-No.95CH35771 - 1995-IEEE-Symposium-on-Circuits-and-Systems-Cat.-No.95CH35771, États-Unis (1995) [hal-00012053 - version 1]
New self-timed rings and their application to division and square root extraction
El-Hassan B. et al
In ESSCIRC-'95.-Twenty-First-European-Solid-State-Circuits-Conference.-Proceedings. - ESSCIRC-'95.-Twenty-First-European-Solid-State-Circuits-Conference.-Proceedings., France (1995) [hal-00012051 - version 1]
Deep etch X-ray lithography using silicon-gold masks fabricated by deep etch UV lithography and electroforming
Ballandras S. et al
Journal of Micromechanics and Microengineering Vol.5, Issue 3 (1995) 203-8 [hal-00008930 - version 1]
A low-cost, highly reliable SEU-tolerant SRAM: prototype and test results
Calin T. et al
IEEE-Transactions-on-Nuclear-Science Dec. 1995; 42(6) pt. 1 (1995) 1592-8 [hal-00008258 - version 1]
SEU fault tolerance in artificial neural networks
Velazco R. et al
IEEE-Transactions-on-Nuclear-Science. Dec. 1995; 42(6) pt. 1 (1995) 1856-62 [hal-00008257 - version 1]
Synthesis steps and design models for codesign
Ismail T. et al
Computer Volume 28 , Issue 2 (February 1995) (1995) 44-52 [hal-00008146 - version 1]