282 articles – 2128 references  [version française]
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Statistical Modelling of Analog Circuits for Test Metrics Computation
Beznia K. et al
In Proc. of 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) - 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), United Arab Emirates (2013) [hal-00842240 - version 1]
Multivariate Statistical Techniques for Analog Parametric Test Metrics Estimation
Huang K. et al
In 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), Abu Dhabi, UAE, March 26-28 - 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), Abu Dhabi, UAE, March 26-28, United Arab Emirates (2013) [hal-00842238 - version 1]
Statistical Static Timing Analysis of Conditional Asynchronous Circuits Using Model-Based Simulation
Yahya E. et al
In Proc. of 19th International Symposium on Asynchronous Circuits and Systems (ASYNC) - 19th International Symposium on Asynchronous Circuits and Systems (ASYNC), United States (2013) [hal-00842226 - version 1]
Non-uniform sampling pattern recognition based on atomic decomposition
Le Pelleter T. et al
In Proc. of 10th International Conference on Sampling Theory and Applications (SampTA 2013) - 10th International Conference on Sampling Theory and Applications (SampTA 2013), Germany (2013) [hal-00842215 - version 1]
From System Model Formalization Towards Correct and Efficient HW/SW Design
Jaber M. et al
In 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) - 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS), , UAE, March 26-28, United Arab Emirates (2013) [hal-00841753 - version 1]
Low-power signal processing platform based on non-uniform sampling and event-driven circuitry
Le Pelleter T. et al
Dans Design, Automation and Test in Europe (DATE'13) - Design, Automation and Test in Europe (DATE'13), France (2013) [hal-00841614 - version 1]
Clustering Techniques and Statistical Fault Injection for Selective Mitigation of SEUs in Flip-Flops
Evans A. et al
Dans International Symposium on Quality Electronic Design (ISQED) - International Symposium on Quality Electronic Design (ISQED), États-Unis (2013) [hal-00841338 - version 1]
An asynchronous FPGA block with its tech-mapping algorithm dedicated to security applications
Beyrouthy T. et al
International Journal of Reconfigurable Computing 2013, Article ID 517947 (2013) 12 pages [hal-00819126 - version 1]
Reliability Challenges of Real-Time Systems in Forthcoming Technology Nodes
Hamdioui S. et al
In Proc. of Design Automation and Test in Europe Conference (Date'13) - Design Automation and Test in Europe Conference (Date'13), France (2013) [hal-00816027 - version 1]
Cramer-Rao lower bounds and maximum likelihood timing synchronization for dirty template UWB communications
Alhakim R. et al
Signal Image and Video Processing Journal 7, 4, July (2013) 741-757 [hal-00672367 - version 1]
fulltext access Génération de séquences de test pour l'accélération d'assertions
Damri L.
Université de Grenoble (17/12/2012), Laurence Pierre (Dir.) [tel-00838669 - version 2]
STAR - Dépôt national des thèses électroniques
Accurate Estimation of Analog Test Metrics With Extreme Circuits
Beznia K. et al
In In IEEE International Conference on Electronics, Circuits, and Systems (ICECS) - In IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Spain (2012) [hal-00765175 - version 1]
A Tool for Statistical Modelling by Means of Copulas of Analog and Mixed-Signal Circuits
Bounceur A. et al
In In 27th conference on Design of Circuits and Integrated Systems (DCIS'12) - In 27th conference on Design of Circuits and Integrated Systems (DCIS'12), France (2012) [hal-00765185 - version 1]
fulltext access Implementation of a fault diagnosis method for timed discrete-event systems
Suiphon B. et al
[hal-00752495 - version 1] (16/11/2012)
Modeling of thin resistive sheets in the Ddscontinuous Galerkin method for shielding evaluation
Boubekeur M. et al
In Proceedings of the 15th Biennial IEEE Conference on Electromagnetic Field Computation - IEEE CEFC 2012, Japan (2012) [hal-00783302 - version 1]
fulltext access Méthodes et outils pour l'analyse tôt dans le flot de conception de la sensibilité aux soft-erreurs des applications et des circuits intégrés
Mansour W.
Université de Grenoble (31/10/2012), Raoul Velazco (Dir.) [tel-00838415 - version 2]
STAR - Dépôt national des thèses électroniques
fulltext access Gestion de l'activité et de la consommation dans les architectures multi-coeurs massivement parallèles
Bizot G.
Université de Grenoble (25/10/2012), Mihail Nicolaidis;Nacer-eddine Zergainoh (Dir.) [tel-00838435 - version 2]
STAR - Dépôt national des thèses électroniques
fulltext access Méthode de modélisation et de raffinement pour les systèmes hétérogènes. Illustration avec le langage System C-AMS
Paugnat F.
Université de Grenoble (25/10/2012), Laurent Fesquet;Katell Morin-allory (Dir.) [tel-00800204 - version 1]
STAR - Dépôt national des thèses électroniques
fulltext access Architectures pour des circuits fiables de hautes performances
Bonnoit T.
Université de Grenoble (18/10/2012), Mihail Nicolaidis;Nacer-eddine Zergainoh (Dir.) [tel-00838425 - version 2]
STAR - Dépôt national des thèses électroniques
Emulation platform for an adaptive NoC-based MPSoC architecture dedicated to spectral imaging for art authentication
Tan J. et al
In International Conference on Image Processing Theory, Tools and Applications - IPTA 2012 : International Conference on Image Processing Theory, Tools and Applications, Turkey (2012) [ujm-00738494 - version 1]