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Efficient minimization of test frequencies for linear analog circuits Bentobache M. et al In ETS 2013 - 18th IEEE European Test Symposium (ETS), France (2013) [hal-00789857 - version 1]

Multivariate Statistical Techniques for Analog Parametric Test Metrics Estimation Huang K. et al Dans DTIS 2013 - DTIS 2013, Émirats Arabes Unis (2013) [hal-00780022 - version 1]

Parametric test metrics estimation using statistical modelling, In IEEE International Conference on Design & Technology of Integrated Systems Beznia K. et al Dans IEEE International Conference on Design & Technology of Integrated Systems in nanoscale era (DTIS'13) - IEEE International Conference on Design & Technology of Integrated Systems in nanoscale era (DTIS'13), France (2013) [hal-00765157 - version 1]

Single glucose biofuel cells implanted in rats power electronic devices. Zebda A. et al Sci Rep 3 (2013) 1516 [hal-00809303 - version 1]

Modular Modelling for the Diagnostic of Complex Discrete-Event Systems Eric G. et al IEEE Transactions on Automation Science and Engineering 9, 4 (2013) 1100-1125 [hal-00787538 - version 1]

An asynchronous FPGA block with its tech-mapping algorithm dedicated to security applications Beyrouthy T. et al International Journal of Reconfigurable Computing 2013, Article ID 517947 (2013) 12 pages [hal-00819126 - version 1]

Data Mining MPSoC Simulation Traces to Identify Concurrent Memory Access Patterns Lagraa A. et al Dans Proc. of Design Automation and Test in Europe Conference (DATE'13) - Design Automation and Test in Europe Conference (DATE'13), France (2013) [hal-00817027 - version 1]

Accurate Estimation of Analog Test Metrics With Extreme Circuits Beznia K. et al Dans In IEEE International Conference on Electronics, Circuits, and Systems (ICECS) - In IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Espagne (2012) [hal-00765175 - version 1]

A Tool for Statistical Modelling by Means of Copulas of Analog and Mixed-Signal Circuits Bounceur A. et al Dans In 27th conference on Design of Circuits and Integrated Systems (DCIS'12) - In 27th conference on Design of Circuits and Integrated Systems (DCIS'12), France (2012) [hal-00765185 - version 1]

Implementation of a fault diagnosis method for timed discrete-event systems Suiphon B. et al [hal-00752495 - version 1] (2012-11-16)

Modeling of thin resistive sheets in the Ddscontinuous Galerkin method for shielding evaluation Boubekeur M. et al Dans Proceedings of the 15th Biennial IEEE Conference on Electromagnetic Field Computation - IEEE CEFC 2012, Japon (2012) [hal-00783302 - version 1]

Méthode de modélisation et de raffinement pour les systèmes hétérogènes. Illustration avec le langage System C-AMS Paugnat F. Université de Grenoble (25/10/2012), Laurent Fesquet;Katell Morin-allory (Dir.) [tel-00800204 - version 1]

Emulation platform for an adaptive NoC-based MPSoC architecture dedicated to spectral imaging for art authentication Tan J. et al Dans International Conference on Image Processing Theory, Tools and Applications - IPTA 2012 : International Conference on Image Processing Theory, Tools and Applications, Turquie (2012) [ujm-00738494 - version 1]

Case study: deployment of the 2D NoC on 3D for the generation of large emulation platforms. Fresse V. et al Dans IEEE International Symposium on Rapid System Prototyping - IEEE International Symposium on Rapid System Prototyping, Finlande (2012) [ujm-00738489 - version 1]

Performance evaluation of centralized maintenance workshop by using Queuing Networks Simeu-Abazi Z. et al Dans AMEST'2012 - Advanced Maintenance Engineering, Services and Technology AMEST' 2012,, Espagne (2012) [hal-00787542 - version 1]

A New Robust True Random Numbers Generator Using Self-Timed Rings Cherkaoui A. et al Cryptographic architectures embedded in reconfigurable devices - Cryptarchi 2012, France (2012) [ujm-00712552 - version 1]

Outil de modélisation statistique des circuits analogiques et mixtes Saoud B. et al Journées GDR SoC-SiP, France (2012) [hal-00745461 - version 1]

Test metrics computation using the statistical model of analog circuits Beznia K. et al Journées GDR SoC-SiP, France (2012) [hal-00745445 - version 1]

Une application efficace du problème de recouvrement au test de circuits analogiques Bentobache M. et al In 13e congrès annuel de la Société française de Recherche Opérationnelle et d'Aide à la Décision - ROADEF 2012, France (2012) [hal-00678609 - version 1]

Modélisation à haut niveau de systèmes hétérogènes, interfaçage analogique /numérique Cenni F. Université de Grenoble (2012-04-06), Emmanuel Simeu (Dir.) [tel-00721972 - version 1]