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Conception pour la faible consommation en technologies SOI 2D et 3D : application à l'arithmétique Abou-Samra S.J. Institut National Polytechnique de Grenoble - INPG (18/12/1998), GUYOT A. (Dir.) [tel-00002982 - version 1]

Low power SOI CMOS multipliers: 2D vs. 3D Abou-Samra S.J. et al Dans ESSCIRC-'98.-Proceedings-of-the-24th-European-Solid-State-Circuits-Conference. - ESSCIRC-'98.-Proceedings-of-the-24th-European-Solid-State-Circuits-Conference., Pays-Bas (1998) [hal-00014390 - version 1]

Low power CMOS digital design Guyot A. et al Dans Proceedings-of-the-Tenth-International-Conference-on-Microelectronics-Cat.-No.98EX186 - Proceedings-of-the-Tenth-International-Conference-on-Microelectronics-Cat.-No.98EX186, Tunisie (1998) [hal-00014385 - version 1]

3D CMOS SOI for high performance computing Abou-Samra S.J. et al Dans International Symposium on Low Power Electronics and Design - (1998) [hal-00007758 - version 1]

Modeling power consumption in arithmetic operators Guyot A. et al Microelectronic Engineering Dec. ; 39(1-4) (1997) 245-53 [hal-00014715 - version 1]

Designing with 3D SOI CMOS Abou-Samra S.J. et al Dans Proceedings-of-the-Eighth-International-Symposium-on-Silicon-on-Insulator-Technology-and-Devices - (1997) [hal-00007895 - version 1]