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40nm CMOS 0.35V-Optimized Standard Cell Libraries for Ultra-Low Power Applications Abouzeid F. et al Transactions on Design Automation of Electronic Systems 16, 3 (2011) article 35 [hal-00672355 - version 1]

Etude d'architecture et circuiterie digitale dans le régime sous-le-seuil en technologie submicronique Abouzeid F. Université de Grenoble (2010-11-18), Sicard G. (Dir.) [tel-00591527 - version 1]

A 40nm CMOS, 1.27nJ, 330mV, 600kHz, Bose Chaudhuri Hocquenghem 252 bits frame decoder Clerc S. et al Dans Proc. of IEEE International Conference on Integrated Circuit Design and Technology (ICICDT'10) - IEEE International Conference on Integrated Circuit Design and Technology (ICICDT'10), France (2010) [hal-00569011 - version 1]