| Fiche détaillée | Communications avec actes |
|
|
| Proceedings-International-Test-Conference-1990-Cat.-No.90CH2910-6., Washington, DC : États-Unis (1990) |
|
|
| Efficient UBIST implementation for microprocessor sequencing parts |
|
|
| M. Nicolaidis1, 2 |
|
|
| An improved self-checking solution for the sequencing part of the MC 68000 microprocessor is presented. Compared with previous self-checking schemes for this microprocessor, the present scheme makes its possible to reduce the overhead and simplifies the implementation of both functional circuits, and checkers. The unified BIST (built-in self-test) method is applied to this scheme. This method uses a merging of self-checking and BIST techniques and allows a high fault coverage for all tests needed for integrated circuits, e.g., offline test (design verification, manufacturing, and maintenance test) and online concurrent error detection. An area overhead of about 27% is required, which is quite satisfactory in comparison with previous results. |
|
|
|
|
|
|
|
|
| 1 : | IROC TECHNOLOGIES - iROc Technologies |
| 2 : | TIMA - Techniques of Informatics and Microelectronics for integrated systems Architecture |
|
|
|
|
|
|
| logic-testing – production-testing – mentation-for-microprocessor-sequencing – self-checking – MC-68000-microprocessor – functional-circuits – unified-BIST – fault-coverage – integrated-circuits – offline-test – design-verification – maintenance-test – online-concurrent-error-detection – area-overhead |
| hal-00014037, version 1 | |
| http://hal.archives-ouvertes.fr/hal-00014037 | |
| oai:hal.archives-ouvertes.fr:hal-00014037 | |
| Contributeur : Lucie Torella | |
| Soumis le : Jeudi 17 Novembre 2005, 11:33:07 | |
| Dernière modification le : Jeudi 23 Février 2006, 16:24:05 | |