279 articles – 2094 references  [version française]
Detailed view Article in peer-reviewed journal
IEEE-Transactions-on-Nuclear-Science Volume: 50 , Issue: 6 , Part 1 (2003) 2101 - 2106
Impact of data cache memory on the single event upset-induced error rate of microprocessors
F. Faure1, R. Velazco2, M. Violante2, M. Rebaudengo2, M.S. Reorda2

Cache memories embedded in most of complex processors significantly contribute to the global single event upset-induced error rate. Three different approaches allowing the study of this contribution by fault injection are investigated in this paper.
1:  IST. DI ASTROFISICA SPAZIALE E FISICA COSMICA - CNR
2:  TIMA - Techniques of Informatics and Microelectronics for integrated systems Architecture
data-cache-memory – single-event-upset-induced-error-rate – microprocessors-