147 articles – 175 Notices  [english version]
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European Wireless Technology Conference 2009, Rome : Italie (2009)
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Low Power Multistandard Simultaneous Reception Architecture
Ioan Burciu1, Jacques Verdier2, Guillaume Villemaud1

In this paper, we address the architecture of multistandard simultaneous reception receivers and we aim at improving both the complexity and the power consumption of the analog front-end. To this end we propose an architecture using the double orthogonal translation technique in order to multiplex two received signals. A study case concerning the simultaneous reception of 802.11g and UMTS signals is developed in this article.
1 :  CITI Insa Lyon / INRIA Grenoble Rhône-Alpes - SWING
2 :  INL - Institut des nanotechnologies de Lyon - Site d'Ecully