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Optical Look Up Table Li Z. et al Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013, France (2013) [hal-00823743 - version 1]

Layout Guidelines for 3D Architectures including Optical Ring Network-on-Chip (ORNoC) Le Beux S. et al 19th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC), Chine (2011) [inria-00618605 - version 1]

FPGA design with double-gate carbon nanotube transistors Ben Jamma H. et al Dans (2011) ECS Transactions - 10th China Semiconductor Technology International Conference 2011, CSTIC 2011, France (2011) [hal-00669403 - version 1]

Optical Ring Network-on-Chip (ORNoC): Architecture and Design Methodology Le Beux S. et al Design, Automation & Test in Europe Conference & Exhibition (DATE), France (2011) [inria-00618600 - version 1]

Multi-Optical Network-on-Chip for Large Scale MPSoC Le Beux S. et al IEEE embedded systems letters (2010) [inria-00618593 - version 1]

Analog Circuit Design (chapter 5) Freitas P. et al Dans Planar Double-Gate Transistor From Technology to Circuit (2009) 105-136 [hal-00372107 - version 1]

ISVLSI'08: Annual Symposium on VLSI Torres L. et al (2008) N/A [lirmm-00352429 - version 1]

CNTFET Modeling and Reconfigurable Logic-Circuit Design O'Connor I. et al IEEE Transactions on Circuits and Systems (2007) Vol. 54, No. 11, pp. 2365-2379, November 2007 [hal-00187137 - version 1]